Cyclone® 10 LP Device Overview

ID 683879
Date 5/27/2022
Public

Clocking and PLL

Intel® Cyclone® 10 LP devices feature global clock (GCLK) networks, dedicated clock pins, and general purpose PLLs.
  • Up to 20 GCLK networks that drive throughout the device
  • Up to 15 dedicated clock pins
  • Up to four general purpose PLLs with five outputs per PLL

The PLLs provide robust clock management and synthesis for the Intel® Cyclone® 10 LP device. You can dynamically reconfigure the PLLs in user mode to change the clock phase or frequency.