eCPRI Intel® FPGA IP Design Example User Guide

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ID 683837
Date 5/18/2024
Public
Document Table of Contents
Document Table of Contents x
1. Quick Start Guide 2. Design Example Description 3. eCPRI Intel® FPGA IP Design Example User Guide Archives 4. Document Revision History for eCPRI Intel® FPGA IP Design Example User Guide
1. Quick Start Guide x
1.1. Hardware and Software Requirements 1.2. Generating the Design 1.3. Directory Structure 1.4. Simulating the Design Example Testbench 1.5. Compiling the Compilation-Only Project 1.6. Compiling and Configuring the Design Example in Hardware 1.7. Testing the eCPRI Intel FPGA IP Design Example 1.8. Generating and Downloading the Executable and Linking Format (.elf) Programming File
1.4. Simulating the Design Example Testbench x
1.4.1. Enabling Dynamic Reconfiguration to the Ethernet IP
2. Design Example Description x
2.1. Features 2.2. eCPRI IP Hardware Design Example 2.3. Simulation Design Example 2.4. Interface Signals 2.5. Design Example Register Map
1. Quick Start Guide
2. Design Example Description
3. eCPRI Intel® FPGA IP Design Example User Guide Archives
4. Document Revision History for eCPRI Intel® FPGA IP Design Example User Guide

1.8. Generating and Downloading the Executable and Linking Format (.elf) Programming File

This task describes how to generate and build a Nios V processor software project. For a streamlined build flow, ensure you create the same directory tree in your design project as in this task..

  1. In your design project directory,, create a directory software.
  2. In the software directory,, create two directories app and bsp.
  3. Copy all the files in <design_example_dir>/synthesis/ed_fw to <design_example_dir>/synthesis/quartus/software/app.
    The design files are: 
    c2_reconfig.h
c3_funtion.c
c3_recongifg.c
c3_reconfig.h
flow.c
flow.h
main.c
  4. Generate the BSP:
    1. Launch the Nios V Command Shell
    2. Go to <design_example_dir>/synthesis/quartus/software directory.
    3. Run the following command. 
      niosv-bsp -c --quartus-project=../ecpri_ed.qpf --
qsys=../../ip_components/nios_system.qsys --type=hal ./bsp/settings.bsp
  5. Generate the application project: 
    niosv-app --bsp-dir=./bsp --app-dir=./app --srcs=./app/ --elf-name=nios_system.elf
  6. Build the application project: 
    cmake -G "Unix Makefiles" -S ./app -B ./app/build make -C ./app/build
    The nios_system.elf file is generated in the <design_example_dir>/synthesis/quartus/software/app/build directory.
  7. Program the Nios V processor:
    1. Go to <design_example_dir>/synthesis/quartus/software/app/build
    2. Type the following command in the Nios V Command Shell.
      • For Stratix 10 devices:
        niosv-download -g -r nios_system.elf -c 1 -d 1 -i 0
      • For Agilex 7 devices: 
        niosv-download -g -r nios_system.elf -c 1 -d 0 -i 0
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