Intel® Arria® 10 GX, GT, and SX Device Family Pin Connection Guidelines

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ID 683814
Date 1/14/2022
Public
Document Table of Contents
Document Table of Contents x
Intel® Arria® 10 GX, GT, and SX Device Family Pin Connection Guidelines
Intel® Arria® 10 GX, GT, and SX Device Family Pin Connection Guidelines x
Intel® Arria® 10 GX and GT Pin Connection Guidelines Intel® Arria® 10 SX Pin Connection Guidelines Power Supply Sharing Guidelines for Intel® Arria® 10 Devices Document Revision History for the Intel® Arria® 10 GX, GT, and SX Device Family Pin Connection Guidelines
Intel® Arria® 10 GX and GT Pin Connection Guidelines x
Clock and PLL Pins Dedicated Configuration/JTAG Pins Optional/Dual-Purpose Configuration Pins Partial Reconfiguration Pins 3V Compatible I/O Pins Differential I/O Pins External Memory Interface and Hard Memory PHY Pins Reference Pins Voltage Sensor Pins Supply Pins Transceiver Pins Notes to Intel® Arria® 10 GX and GT Pin Connection Guidelines
Intel® Arria® 10 SX Pin Connection Guidelines x
HPS Supply Pins HPS Dedicated I/O Bank Pins HPS Peripheral Pins Shared 3V I/O Bank Pins Notes to Intel® Arria® 10 SX Pin Connection Guidelines
Power Supply Sharing Guidelines for Intel® Arria® 10 Devices x
Example 1— Intel® Arria® 10 GX Example 2— Intel® Arria® 10 GX Example 3— Intel® Arria® 10 GX Example 4— Intel® Arria® 10 GT Example 5— Intel® Arria® 10 GT Example 6— Intel® Arria® 10 GT Example 7— Intel® Arria® 10 GT Example 8— Intel® Arria® 10 SX Example 9— Intel® Arria® 10 SX Example 10— Intel® Arria® 10 SX Example 11— Intel® Arria® 10 GX (Using the SmartVID Feature) Notes to Power Supply Sharing Guidelines
Intel® Arria® 10 GX, GT, and SX Device Family Pin Connection Guidelines

Example 5— Intel® Arria® 10 GT

Table 20.  Power Supply Sharing Guidelines for Intel® Arria® 10 GT with Transceiver Data Rate <= 11.3 Gbps for Chip-to-Chip ApplicationsExample Requiring 2 Power Regulators
Power Pin Name Regulator Group Voltage Level (V) Supply Tolerance Power Source Regulator Sharing Notes
VCC 1 0.95 ± 30mV Switcher (*) Share You have the option to source VCC and VCCP from the same regulator as VCCERAM when all the power rails require the same voltage level. When sharing the same regulator for VCCERAM, VCC, and VCCP, the SmartVID feature is not available. If you use the SmartVID feature, then VCC and VCCP need to be sourced by a separate dedicated regulator.
VCCP
VCCERAM
VCCR_GXB[L,R] Isolate

Option provided to share VCCR_GXB and VCCT_GXB with the same regulator as VCC, VCCP, and VCCERAM when all power rails require 0.95 V with proper isolation filter. For details, refer to note 1 of the Notes to Power Supply Sharing Guidelines. VCCR_GXB and VCCT_GXB must be 1.03 V or higher in order to support PCIe Gen 3. To meet DisplayPort TX electrical full compliance, VCCT_GXB must be 1.03 V or higher.

When implementing a filtered supply topology, you must consider the IR drop across the filter. For designs that have high-current for VCCR_GXB or VCCT_GXB, you should consider the IR drop through the supply planes and compensate for it.

VCCT_GXB[L,R]
VCCBAT 2 Varies ± 5% (**) Switcher (*) Share if 1.8V Option provided for VCCBAT, VCCPT, VCCIO, and VCCPGM to share the same regulator when all power rails require 1.8 V. Depending on the regulator capabilities, you have the option to share this supply with multiple Intel® Arria® 10 devices.
VCCPT 1.8
VCCIO Varies
VCCPGM
VCCH_GXB[L,R] 1.8 Isolate Option provided to share VCCH_GXB and VCCA_PLL with the same regulator as VCCBAT, VCCPT, VCCIO, and VCCPGM when all power rails require 1.8 V with a proper isolation filter.
VCCA_PLL

(*)When using a switcher to supply these voltages, the switcher must be a low noise switcher as defined in note 7 of the Notes to Intel® Arria® 10 GX and GT Pin Connection Guidelines.

(**)The supported tolerance for the VCCIO power supply varies depending on the I/O standards. For more details, refer to the I/O standard specification in the Intel® Arria® 10 Device Datasheet. Use the EPE (Early Power Estimation) tool to assist in determining the power required for your specific design.

Each board design requires its own power analysis to determine the required power regulators needed to satisfy the specific board design requirements. An example block diagram using the Intel® Arria® 10 GT device is provided in Figure 5.

Figure 5. Example Power Supply Sharing Guidelines for Intel® Arria® 10 GT with Transceiver Data Rate <= 11.3 Gbps for Chip-to-Chip Applications
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