Intel® FPGA SDK for OpenCL™: Intel® Arria® 10 SoC Development Kit Reference Platform Porting Guide

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ID 683788
Date 10/08/2019
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Document Table of Contents
Document Table of Contents x
1. Intel® FPGA SDK for OpenCL™ Intel® Arria® 10 SoC Development Kit Reference Platform Porting Guide 2. Developing an Intel Arria 10 SoC Custom Platform 3. Building the Software and SD Card Image for the Intel® Arria® 10 SoC Development Kit Reference Platform 4. Intel® FPGA SDK for OpenCL™ Intel® Arria® 10 SoC Development Kit Reference Platform Porting Guide Archives 5. Document Revision History for Intel® FPGA SDK for OpenCL™ : Intel® Arria® 10 SoC Development Kit Reference Platform Porting Guide
1. Intel® FPGA SDK for OpenCL™ Intel® Arria® 10 SoC Development Kit Reference Platform Porting Guide x
1.1. Intel Arria 10 SoC Development Kit Reference Platform: Prerequisites 1.2. Features of the Intel Arria 10 SoC Development Kit Reference Platform 1.3. Intel Arria 10 SoC Development Kit Reference Platform Board Variants 1.4. Contents of the Intel Arria 10 SoC Development Kit Reference Platform 1.5. Changes in Intel Arria 10 SoC Development Kit Reference Platform from 17.0 to 17.1 1.6. Changes in Intel Arria 10 SoC Development Kit Reference Platform from 17.1.2 to 18.0
2. Developing an Intel Arria 10 SoC Custom Platform x
2.1. Initializing an Intel Arria 10 SoC Custom Platform 2.2. Modifying Your Intel Arria 10 SoC Custom Platform 2.3. Integrating Your Intel Arria 10 SoC Custom Platform with the Intel® FPGA SDK for OpenCL™ 2.4. Changing the Device Part Number 2.5. Modifying the Kernel PLL Reference Clock 2.6. Modifying the Hard Processor System 2.7. Guaranteeing Timing Closure in the Intel Arria 10 SoC Custom Platform 2.8. Generating the base.qar Post-Fit Netlist for Your Intel Arria 10 SoC FPGA Custom Platform
3. Building the Software and SD Card Image for the Intel® Arria® 10 SoC Development Kit Reference Platform x
3.1. Compiling the Device Tree Blob 3.2. Compiling the Linux Kernel for the Intel Arria 10 SoC Development Kit 3.3. Compiling the OpenCL Linux Kernel Driver 3.4. Generating Full-Chip Programming File for SD Card Image 3.5. Building the SD Card Image 3.6. Known Issues
3.5. Building the SD Card Image x
3.5.1. Layout of the OpenCL Micro SD Card 3.5.2. Creating the SD Card Image 3.5.3. Guidelines on Imaging the Micro SD Card
3.5.2. Creating the SD Card Image x
3.5.2.1. Creating Partition 1 of the SD Card Image 3.5.2.2. Creating Partition 2 of the SD Card Image 3.5.2.3. Creating Partition 3 of the SD Card Image
1. Intel® FPGA SDK for OpenCL™ Intel® Arria® 10 SoC Development Kit Reference Platform Porting Guide
2. Developing an Intel Arria 10 SoC Custom Platform
3. Building the Software and SD Card Image for the Intel® Arria® 10 SoC Development Kit Reference Platform
4. Intel® FPGA SDK for OpenCL™ Intel® Arria® 10 SoC Development Kit Reference Platform Porting Guide Archives
5. Document Revision History for Intel® FPGA SDK for OpenCL™ : Intel® Arria® 10 SoC Development Kit Reference Platform Porting Guide

3.5.2.2. Creating Partition 2 of the SD Card Image

To create partition 2 of the SD card image:

  1. Mount partition 2 in the sdimage.img file as a loop-back device.
    To mount a partition:
    1. Determine the byte start of the partition within the image by invoking the /sbin/fdisk -lu image_file command.
    2. Identify a free loop device (for example, /dev/loop0) by typing the losetup -f command.
    3. Assign your flash card image to the loop block device by invoking the losetup command.
      For example, if /dev/loop0 is the free loop device, issue the following command: 
      losetup /dev/loop0 image_file -o <byte offset>
    4. Mount the loop device.
      For example, if /dev/loop0 is the loop device and the mount point is media/disk2, issue the following command: 
      mount /dev/loop0 media/disk2
      Within the image file, media/disk2 is now mounted.
  2. From the Intel® Download Center for FPGAs, download and unpack the Intel® FPGA Runtime Environment for OpenCL* Linux Cyclone® V SoC TGZ file:
    To download and unpack the file:
    1. Go the Intel® Download Center for FPGAs page for the Intel® FPGA SDK for OpenCL™ at the following URL: http://fpgasoftware.intel.com/opencl/?edition=pro.
    2. Click the RTE tab, select Intel FPGA Runtime Environment for OpenCL Linux SoC TGZ, and click Download to download the file.
    3. Unpack the downloaded file (aocl-rte-<version>.arm32.tgz) to a directory that you own.
  3. Place the unpacked aocl-rte-<version>.arm32 directory into the /home/root/opencl_arm32_rte directory on partition 2 of the image file.
  4. Copy aclsoc_drv.ko to the /home/root/opencl_arm32_rte/board/a10soc/arm32/driver/ directory on partition 2 of the image file.
  5. Create the init_opencl.sh file in the /home/root directory with the following content: 
    export INTELFPGAOCLSDKROOT=/home/root/opencl_arm32_rte
export AOCL_BOARD_PACKAGE_ROOT=$INTELFPGAOCLSDKROOT/board/a10soc
export PATH=$INTELFPGAOCLSDKROOT/bin:$PATH
export LD_LIBRARY_PATH=$INTELFPGAOCLSDKROOT/host/arm32/lib:$LD_LIBRARY_PATH
insmod $AOCL_BOARD_PACKAGE_ROOT/arm32/driver/aclsoc_drv.ko

    The SDK user runs a source ./init_opencl.sh command to load the environment variables and the OpenCL* Linux kernel driver.

  6. After you store all the necessary files onto the flash card image, run the following commands: 
    sync
umount media/disk2
losetup -d /dev/loop0
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