Visible to Intel only — GUID: pyw1514929618718
Ixiasoft
Visible to Intel only — GUID: pyw1514929618718
Ixiasoft
1.1. Tutorial Overview
Reusing Core Partitions
Core partition reuse allows a Developer to create, preserve, and export a partition for reuse. The Developer exports the core partition as a .qdb, and then a Consumer can reuse that core partition in another project. The core partition can include only core resources, such as LUTs, flip-flops, M20K memory, and DSP blocks. To use this flow you assign the .qdb to an instance in the Consumer project.
Reusing Root Partitions
Root partition reuse enables you to export a synthesized or final snapshot of the device periphery and associated core logic. To export and reuse periphery elements, you export the root partition. The periphery resources include all the hardened IP in the device periphery (such as general purpose I/O, PLLs, high-speed transceivers, PCIe, and external memory interfaces), as well as associated core logic. The Developer also reserves a region for core logic development by the Consumer. The Developer defines this reserved region with a partition. The Developer defines at least the module's port connections as a black box file.
When you export the synthesized or final partition as a .qdb, the .qdb preserves the results of that compilation stage. When you subsequently reuse that partition in another project, the Compiler reuses the previous compilation results from the .qdb for that partition, thereby leveraging the previous design efforts of the Developer.
The tutorial includes the following modules: