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1.1. Tutorial Overview
1.2. Tutorial Software and Hardware
1.3. Tutorial Files
1.4. Core Partition Reuse—Developer Tutorial
1.5. Core Partition Reuse—Consumer Tutorial
1.6. Root Partition Reuse—Developer Tutorial
1.7. Root Partition Reuse—Consumer Tutorial
1.8. (Optional) Step 8: Device Programming
1.9. AN 839: Design Block Reuse Tutorial Document Revision History
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1.5.4. Step 4: Hardware Verification (Optional)
You can now optionally verify the results of the Core Partition Reuse—Consumer Tutorial module in hardware by completing (Optional) Step 8: Device Programming.
After completing this tutorial module, LEDs D6-D3 map to the blinking_led core, and LEDs D10-D7 map to the top-level design. After configuring the FPGA, the blinking_led core flashes red LEDs in a binary counting order. The top-level design shows a shifting bit in green.
Figure 14. Illumination of LEDs After Core Partition Reuse—Consumer Tutorial Module