Visible to Intel only — GUID: ust1574431099384
Ixiasoft
Visible to Intel only — GUID: ust1574431099384
Ixiasoft
1. Overview
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Intel® Quartus® Prime Design Suite 23.1 |
Configuration via Protocol (CvP) is a configuration scheme supported in Arria® V, Cyclone® V, Stratix® V, Arria® 10, Stratix® 10, Cyclone® 10 GX, and Agilex™ FPGAs. The CvP configuration scheme creates separate images for the periphery and core logic. You can store the periphery image in a local configuration device and the core image in host memory, reducing system costs and increasing the security for the proprietary core image. CvP configures the Intel® FPGA fabric through the PCI Express* ( PCIe* ) link, and is available for Endpoint variants only.
This document describes the CvP configuration scheme for Agilex™ 7 FPGAs.