Intel® Arria® 10 Hard Processor System Technical Reference Manual

ID 683711
Date 8/28/2023
Public
Document Table of Contents

A.8.1. Full FPGA Reconfiguration

A full FPGA reconfiguration requires a system reboot. The following table details the supported reconfiguration options:
Table 326.  Supported Reconfiguration Options
Reconfiguration Option Configuration Method HPS Reboot Required
FPGA Core Only Partial Reconfiguration No
FPGA andHPS Shared I/O 64 Full Reconfiguration Yes
FPGA65 64 Full Reconfiguration Yes
HPS Shared I/O66 64 Full Reconfiguration Yes
FPGA Core + FPGA I/O + HPS Shared I/O64 Full Reconfiguration Yes

If a new FPGA fabric image is required and performing a system reboot is acceptable, then you can update the FPGA image in flash and perform a full system reboot of both hardware and software before following the steps found in the "Arria 10 SoC FPGA Configuration Sequence Through FPGA Manager."

Figure 183. Full FPGA Fabric Reconfiguration with System Reboot

If a new FPGA fabric image is required and performing a system reboot is unacceptable because the hard memory controller or shared I/O are being used by the HPS, then you can perform a reconfiguration using the available partial reconfiguration support. For the partial reconfiguration sequence, follow the steps found in the "Arria 10 SoC FPGA Partial Reconfiguration Sequence Through FPGA Manager" section.

Figure 184. Full FPGA Fabric Reconfiguration without System Reboot
Note: It is important that the HPS is not held in cold or warm reset indefinitely, otherwise the CSS cannot be accessible to FPGA configuration sources.
64 HPS dedicated I/O are not affected by full reconfiguration.
65 HPS dedicated I/O are not affected by full reconfiguration.
66 HPS dedicated I/O are not affected by full reconfiguration.