Remote Update Intel® FPGA IP User Guide

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ID 683695
Date 8/16/2022
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Document Table of Contents
Document Table of Contents x
1. Remote Update Intel® FPGA IP User Guide
1. Remote Update Intel® FPGA IP User Guide x
1.1. Avalon®-MM in Remote Update Intel® FPGA IP Core 1.2. Intel Arria 10 and Intel Cyclone® 10 GX Devices 1.3. Arria II, Arria V, Cyclone V, Stratix IV, and Stratix V Devices 1.4. Cyclone IV and Intel Cyclone 10 LP Devices 1.5. Flash Memory Programming Files 1.6. Design Examples 1.7. Remote Update Intel® FPGA IP User Guide Archives 1.8. Document Revision History for the Remote Update Intel® FPGA IP User Guide
1.2. Intel Arria 10 and Intel Cyclone® 10 GX Devices x
1.2.1. Remote System Configuration Mode 1.2.2. Remote System Configuration Components 1.2.3. Parameter Settings 1.2.4. Ports 1.2.5. Parameters 1.2.6. Avalon-MM Interface 1.2.7. Enabling Remote System Upgrade Circuitry 1.2.8. Generating Initial RSU Image
1.2.1. Remote System Configuration Mode x
1.2.1.1. Remote System Upgrade State Machine
1.2.1.1. Remote System Upgrade State Machine x
1.2.1.1.1. Switching from Factory to Application Image or from Initial Application Image to Other Application Image
1.2.6. Avalon-MM Interface x
1.2.6.1. Control Status Register Signals 1.2.6.2. Register Map
1.2.6.1. Control Status Register Signals x
1.2.6.1.1. Control Status Register Write Operation 1.2.6.1.2. Control Status Register Read Operation 1.2.6.1.3. Operations Example Waveforms
1.3. Arria II, Arria V, Cyclone V, Stratix IV, and Stratix V Devices x
1.3.1. Remote System Configuration Mode 1.3.2. Remote System Configuration Components 1.3.3. Parameter Settings 1.3.4. Ports 1.3.5. Parameters 1.3.6. Avalon-MM Interface 1.3.7. Enabling Remote System Upgrade Circuitry
1.3.6. Avalon-MM Interface x
1.3.6.1. Control Status Register Signals 1.3.6.2. Register Map
1.3.6.1. Control Status Register Signals x
1.3.6.1.1. Control Status Register Write Operation 1.3.6.1.2. Control Status Register Read Operation
1.4. Cyclone IV and Intel Cyclone 10 LP Devices x
1.4.1. Remote System Configuration Mode 1.4.2. Remote System Configuration Components 1.4.3. Parameter Settings 1.4.4. Ports 1.4.5. Parameters 1.4.6. Remote Update Operation 1.4.7. Avalon-MM Interface 1.4.8. Enabling Remote System Upgrade Circuitry
1.4.7. Avalon-MM Interface x
1.4.7.1. Control Status Register Signals 1.4.7.2. Register Map 1.4.7.3. Read Source Mapping
1.4.7.1. Control Status Register Signals x
1.4.7.1.1. Control Status Register Write Operation 1.4.7.1.2. Control Status Register Read Operation
1.6. Design Examples x
1.6.1. Intel Arria 10 Remote Update Design Example 1.6.2. Cyclone V Remote Update Design Example
1. Remote Update Intel® FPGA IP User Guide

1.3.7. Enabling Remote System Upgrade Circuitry

To enable the remote system upgrade feature, follow these steps:

  1. Select Active Serial x1/x4 or Configuration Device from the Configuration scheme list in the Configuration page of the Device and Pin Options dialog box in the Intel® Quartus® Prime software.
  2. Select Remote from the Configuration mode list in the Configuration page of the Device and Pin Options dialog box in the Intel® Quartus® Prime software.

Enabling this feature automatically turns on the Auto-restart configuration after error option.

Remote Update Intel® FPGA IP core provides a memory-like interface to the remote system upgrade circuitry and handles the shift register read and write protocol in the device logic.

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