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1.1. Features
1.2. Hardware and Software Requirements
1.3. Compiling the Reference Design
1.4. Hardware Setup
1.5. Generating Executable and Linking Format (.elf) Programming File
1.6. Running the Hardware Reference Design
1.7. Results
1.8. Reference Design Architecture
1.9. Document Revision History for AN 777: Data Word Alignment Calibration With Multiple Intel FPGA PHYLite for Parallel Interfaces IP Cores
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1.8. Reference Design Architecture
Figure 14. Reference Design Block Diagram
The reference design contains:
- dut_INPUT module
- dut_OUTPUT module
- PLL module
- Avalon controller
- ATSO_DYN_CFG_CTRL module with Nios II processor
- Traffic generator