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Ixiasoft
Visible to Intel only — GUID: nik1411172557684
Ixiasoft
1.4.2. Arria 10 Resource Utilization for Low Latency 40-100GbE IP Cores
Resource utilization changes depending on the parameter settings you specify in the Low Latency 40-100GbE parameter editor. For example, if you turn on pause functionality or statistics counters in the LL 40-100GbE parameter editor, the IP core requires additional resources to implement the additional functionality.
40GbE Variation |
ALMs |
Dedicated Logic Registers |
Memory M20K |
---|---|---|---|
40GbE variation A |
5400 | 12800 | 13 |
40GbE variation B |
10100 | 21200 | 13 |
40GbE variation C | 11000 | 24100 | 13 |
40GbE variation D |
14200 | 31100 | 17 |
40GbE variation E |
14400 | 28200 | 26 |
40GbE variation F | 16300 | 29300 | 26 |
100GbE Variation |
ALMs |
Dedicated Logic Registers |
Memory M20K |
100GbE variation A |
13100 | 29000 | 29 |
100GbE variation B |
21200 | 47600 | 61 |
100GbE variation C | 22500 | 51800 | 61 |
100GbE variation D |
27000 | 63200 | 65 |
CAUI-4 Variation |
ALMs |
Dedicated Logic Registers |
Memory M20K |
CAUI-4 variation B |
22700 | 51300 | 61 |