E-tile Hard IP Intel® Stratix® 10 Design Examples User Guide: Ethernet, CPRI PHY, and Dynamic Reconfiguration

ID 683578
Date 3/06/2022
Public

A newer version of this document is available. Customers should click here to go to the newest version.

Document Table of Contents

4.1.5. Testing the E-tile Dynamic Reconfiguration Hardware Design Example

After you compile the E-Tile Dynamic Reconfiguration Design Example and configure it on your device, you can use the Nios® II Software Build Tools (SBT) for Eclipse to compile and test the design in hardware.