Visible to Intel only — GUID: sfo1400785975984
Ixiasoft
Visible to Intel only — GUID: sfo1400785975984
Ixiasoft
1. Introduction to Intel® FPGA Design Flow for AMD* Xilinx* Users
Updated for: |
---|
Intel® Quartus® Prime Design Suite 24.1 |
This document is intended for AMD* Xilinx* designers who are familiar with the AMD* Xilinx* Vivado* software and want to convert existing Vivado* designs to the Quartus® Prime Pro Edition software environment.
This application note starts with a description of the current AMD* Xilinx* and Intel® FPGA technologies and compares devices available for three different process technologies. It further highlights unique features of Agilex™ 7, Stratix® 10, Arria® 10, and Cyclone® 10 GX devices supported in the latest edition of the Quartus® Prime Pro Edition software.
The next chapter draws a parallel between the design flows in the Quartus® Prime Pro Edition software and AMD* Xilinx* Vivado* software, comparing features whenever possible.
The following chapter provides guidelines to convert Vivado* designs to the Quartus® Prime Pro Edition software, including AMD* Xilinx* IP Catalog modules and instantiated primitives. The last part of the chapter demonstrates how to translate device and design constraints.
This application note uses the latest information available for the Quartus® Prime Pro Edition software version 21.3 and AMD* Xilinx* Vivado* Design Suite version 2020.2, supporting the latest programmable chips.