AN 829: PCI Express* Avalon® -MM DMA Reference Design

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ID 683554
Date 6/11/2018
Public
Document Table of Contents
Document Table of Contents x
1. AN 829: PCI Express* Avalon® -MM DMA Reference Design
1. AN 829: PCI Express* Avalon® -MM DMA Reference Design x
1.1. Introduction 1.2. Working with the Reference Design 1.3. Understanding PCI Express Throughput 1.4. Document Revision History for AN 829: PCI Express* Avalon® -MM DMA Reference Design
1.1. Introduction x
1.1.1. DMA Reference Design Hardware and Software Requirements 1.1.2. Avalon® -MM DMA Bridge Module Descriptions
1.2. Working with the Reference Design x
1.2.1. Project Hierarchy 1.2.2. Parameter Settings for PCI Express Hard IP Variations 1.2.3. PCIe* Avalon® -MM DMA Reference Design Platform Designer Systems 1.2.4. DMA Procedure Steps 1.2.5. Setting Up the Hardware 1.2.6. Programming the Intel® Cyclone® 10 GX FPGA Oscillator 1.2.7. Installing the DMA Test Driver and Running the Linux DMA Software
1.3. Understanding PCI Express Throughput x
1.3.1. Throughput for Posted Writes 1.3.2. Throughput for Reads 1.3.3. Throughput Differences for On-Chip and External Memory
1.3.1. Throughput for Posted Writes x
1.3.1.1. Specifying the Maximum Payload Size
1.3.2. Throughput for Reads x
1.3.2.1. Understanding Throughput Measurement
1. AN 829: PCI Express* Avalon® -MM DMA Reference Design

1.2.7. Installing the DMA Test Driver and Running the Linux DMA Software

  1. In a terminal window on computer 1, change to the DMA driver directory and extract AN829_driver.tar by typing the following commands: 
    cd % <install_dir>/<device>/_PCIe<GenxN>DMA_<QuartusVer>_project/driver
% tar -xvf AN829_driver.tar
  2. To install the Linux driver for the appropriate device family, type the command: 
    % sudo./install <device_family>
    Valid values for <device_family> are arria10, cyclone10, and stratix10.
  3. To run the DMA application, type the following command: 
    % ./run

    The application prints the commands available to specify the DMA traffic. By default, the software enables DMA reads, DMA writes, and Simultaneous DMA reads and writes. The following table lists the available commands:

    Table 11.  DMA Test Commands
    Command Number Function
    1 Start the DMA.
    2 Enable or disable read DMA.
    3 Enable or disable write DMA.
    4 Enable or disable simultaneous read and write DMA.
    5 Set the number of dwords per descriptor. The legal range is 256-4096 dwords.
    6 Set the number of descriptors. The legal range is 1-127 descriptors.
    7 By default, the reference design selects on-chip memory. If select this command consecutive runs switch between on-chip and external memory.
    8 Run a the DMA in a continuous loop.
    10 Exit

    For example, type the following commands to specify 4096 dwords per descriptor and 127 descriptors: 

    % 5 4096
% 6 127
% 8
    The following figures show the throughput for DMA reads, DMA writes, and simultaneous DMA reads and writes:
    Figure 8.  Intel® Arria® 10 DMA Throughput
    Figure 9.  Intel® Cyclone® 10 GX DMA Throughput
    Figure 10.  Intel® Stratix® 10 DMA Throughput
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