Intel® Quartus® Prime Standard Edition User Guide: Debug Tools
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Ixiasoft
4.1. Design Flow Using Signal Probe
You can reserve pins for Signal Probe and assign I/O standards after a full compilation. Each Signal Probe-source to Signal Probe-pin connection is implemented as an engineering change order (ECO) that is applied to your netlist after a full compilation.
To route the internal signals to the device’s reserved pins for Signal Probe, perform the following tasks:
- Perform a full compilation.
- Reserve Signal Probe Pins.
- Assign Signal Probe sources.
- Add registers between pipeline paths and Signal Probe pins.
- Perform a Signal Probe compilation.
- Analyze the results of a Signal Probe compilation.
Section Content
Perform a Full Compilation
Reserve Signal Probe Pins
Assign Signal Probe Sources
Add Registers Between Pipeline Paths and Signal Probe Pins
Perform a Signal Probe Compilation
Analyze the Results of a Signal Probe Compilation
What a Signal Probe Compilation Does
Understanding the Results of a Signal Probe Compilation