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1.2.1. Functional Description for the Programmed Input/Output (PIO) Design Example
1.2.2. Functional Description for the Single Root I/O Virtualization (SR-IOV) Design Example
1.2.3. Functional Description for the Performance Design Example
1.2.4. Functional Description for the Performance Design Example for TL Bypass Mode
1.2.5. Hardware and Software Requirements
2.4.5.1. ebfm_barwr Procedure
2.4.5.2. ebfm_barwr_imm Procedure
2.4.5.3. ebfm_barrd_wait Procedure
2.4.5.4. ebfm_barrd_nowt Procedure
2.4.5.5. ebfm_cfgwr_imm_wait Procedure
2.4.5.6. ebfm_cfgwr_imm_nowt Procedure
2.4.5.7. ebfm_cfgrd_wait Procedure
2.4.5.8. ebfm_cfgrd_nowt Procedure
2.4.5.9. BFM Configuration Procedures
2.4.5.10. BFM Shared Memory Access Procedures
2.4.5.11. BFM Log and Message Procedures
2.4.5.12. Verilog HDL Formatting Functions
2.4.5.11.1. ebfm_display Verilog HDL Function
2.4.5.11.2. ebfm_log_stop_sim Verilog HDL Function
2.4.5.11.3. ebfm_log_set_suppressed_msg_mask Task
2.4.5.11.4. ebfm_log_set_stop_on_msg_mask Verilog HDL Task
2.4.5.11.5. ebfm_log_open Verilog HDL Function
2.4.5.11.6. ebfm_log_close Verilog HDL Function
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2.3.1.2. VCS* Simulator
Perform the following steps to execute the simulation via a command line:
- Change to the simulation working directory: cd <my_design>/pcie_ed_tb/pcie_ed_tb/sim/synopsys/vcs.
- Execute the following command: sh vcs_setup.sh USER_DEFINED_COMPILE_OPTIONS="" USER_DEFINED_ELAB_OPTIONS="+define+XTOR_PCIECXL_LM_SVS_SERDES_ARCHITECTURE\ +define+RTILE_PIPE_MODE" USER_DEFINED_SIM_OPTIONS="" TOP_LEVEL_NAME="pcie_ed_tb" | tee simulation.log
Note: The command above is a single-line command.Note: Only use the +RTILE_PIPE_MODE option when the Enable PIPE Mode Simulation parameter is checked.Note: If R-Tile is configured in PIPE Direct Mode, use the following command instead: sh vcs_setup.sh USER_DEFINED_COMPILE_OPTIONS="" USER_DEFINED_ELAB_OPTIONS="+define+XTOR_PCIECXL_LM_SVS_SERDES_ARCHITECTURE\ +define+RTILE_PIPE_MODE" USER_DEFINED_SIM_OPTIONS="" TOP_LEVEL_NAME="pcie_ed_tb" | tee simulation.log.
Note that this is a single-line command.
A successful simulation includes the following message: "Simulation stopped due to successful completion!"
Perform the following steps to execute the simulation in interactive mode. Note that in case you have already generated a simv executable in non-interactive mode, you need to delete the simv file and simv.diadir directory.
- Open the vcs_setup.sh file and add a debug option to the VCS command: vcs -kdb -debug_access+all
- Execute the following command: sh vcs_setup.sh USER_DEFINED_ELAB_OPTIONS="-xlrm\ uniq_prior_final\ -debug_access+all" SKIP_SIM=1 TOP_LEVEL_NAME="pcie_ed_tb"
- Start the simulation in interactive mode: simv -gui &