Intel® FPGA Software Installation and Licensing

ID 683472
Date 7/08/2024
Public
Document Table of Contents

1.1. Quartus® Prime Design Suite Overview

Quartus® Prime Software Editions

The Quartus® Prime Software is available in three editions based on your design requirements:

Table 1.   Quartus® Prime Software Editions
  Pro Edition Standard Edition Lite Edition
Optimized to support the advanced features in Intel FPGAs and SoCs with the following device families:
  • Agilex™ 5
  • Agilex™ 7
  • Stratix® 10
  • Arria® 10
  • Cyclone® 10 GX
Includes extensive support for earlier device families in addition to the following device families:
  • Cyclone® 10 LP
  • MAX® 10
An ideal entry point to Intel’s high-volume device families and is available as a free download with no license file required.

Supported Features

The following is the Quartus® Prime feature support matrix:

Figure 1.  Quartus® Prime Feature Support Matrix

Supported Intel FPGA Developmental Tools

The Quartus® Prime software suite supports the following Intel FPGA development tools:

  • Questa*-Intel® FPGA Edition : Simulates FPGA designs using Intel® -specific simulation libraries. It includes all features of Siemens EDA Questa* Core, including behavioral simulation, HDL test benches, and Tcl scripting.
  • Intel® Advanced Link Analyzer : Analyzes jitter/noise and evaluates high-speed serial link performance. It is an ideal predesign tool supporting Intel FPGA IBIS-AMI standards and enhanced models to help you understand how Intel® FPGA solutions can fit your system requirements.
  • Intel® SoC FPGA Embedded Development Suite : A comprehensive tool suite for embedded software development on Intel® SoC FPGAs.
  • Ashling* RiscFree* IDE for Intel® FPGAs : Integrated development environment for creating embedded applications on the RISC-V-based Nios® V soft processors and the Arm*-based hard processor system.
  • Intel® HLS Compiler : A high-level synthesis (HLS) tool that accepts untimed C++ code as an input and generates production-quality register transfer level (RTL) code optimized for Intel® FPGAs. This tool accelerates verification time over RTL by raising the abstraction level for FPGA hardware design. Models developed in C++ have typically verified orders of magnitude faster than RTL.
  • DSP Builder for Intel® FPGAs : Supports a model-based design flow from algorithms to hardware in a common environment.
  • Intel® oneAPI Base Toolkit : Enables you to target FPGAs for heterogeneous acceleration and simulate entire system flows by abstracting some parts of the hardware.
  • Intel® Simics® simulator for Intel® FPGAs : A full-system simulator that supports defining, developing, and deploying virtual platforms.
  • FPGA AI Suite : Provides several components to help in enabling Artificial Intelligence (AI) and creating optimized Intel FPGA AI platforms efficiently.
  • Intel® FPGA Power and Thermal Calculator : Estimates your design's power consumption and provides thermal design parameters for Intel FPGA devices, such as Agilex™ 7 and Stratix® 10.