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Answers to Top FAQs
1. Introduction to Quartus® Prime Pro Edition
2. Quick Start Steps
3. Planning FPGA Design for RTL Flow
4. Working With Intel® FPGA IP Cores
5. Creating a New FPGA Design Project
6. Migrate Your FPGA Design Project
7. Managing Quartus® Prime Projects
8. Next Steps After Getting Started
A. Using the Design Space Explorer II
B. Document Revision History for Quartus® Prime Pro Edition User Guide Getting Started
4.1. IP Catalog and Parameter Editor
4.2. Installing and Licensing Intel® FPGA IP Cores
4.3. IP General Settings
4.4. Adding IP to IP Catalog
4.5. Best Practices for Intel® FPGA IP
4.6. Specifying the IP Parameters and Options ( Quartus® Prime Pro Edition)
4.7. IP Core Generation Output ( Quartus® Prime Pro Edition)
4.8. Scripting IP Core Generation
4.9. Modifying an IP Variation
4.10. Upgrading IP Cores
4.11. Simulating Intel® FPGA IP Cores
4.12. Generating Simulation Files for Platform Designer Systems and IP Variants
4.13. Synthesizing IP Cores in Other EDA Tools
4.14. Instantiating IP Cores in HDL
4.15. Support for the IEEE 1735 Encryption Standard
4.16. Related Trainings and Resources
6.1.2.1. Modifying Entity Name Assignments
6.1.2.2. Resolving Timing Constraint Entity Names
6.1.2.3. Verifying Generated Node Name Assignments
6.1.2.4. Replace Logic Lock (Standard) Regions
6.1.2.5. Modifying Signal Tap Logic Analyzer Files
6.1.2.6. Removing References to .qip Files
6.1.2.7. Removing Unsupported Feature Assignments
6.1.4.1. Verifying Verilog Compilation Unit
6.1.4.2. Updating Entity Auto-Discovery
6.1.4.3. Ensuring Distinct VHDL Namespace for Each Library
6.1.4.4. Removing Unsupported Parameter Passing
6.1.4.5. Removing Unsized Constant from WYSIWYG Instantiation
6.1.4.6. Removing Non-Standard Pragmas
6.1.4.7. Declaring Objects Before Initial Values
6.1.4.8. Confining SystemVerilog Features to SystemVerilog Files
6.1.4.9. Avoiding Assignment Mixing in Always Blocks
6.1.4.10. Avoiding Unconnected, Non-Existent Ports
6.1.4.11. Avoiding Invalid Parameter Ranges
6.1.4.12. Updating Verilog HDL and VHDL Type Mapping
6.1.4.13. Converting Symbolic BDF Files to Acceptable File Formats
7.1. Viewing Basic Project Information
7.2. Managing Project Settings
7.3. Viewing Parameter Settings From the Project Navigator
7.4. Managing Logic Design Files
7.5. Managing Timing Constraints
7.6. Integrating Other EDA Tools
7.7. Exporting Compilation Results
7.8. Archiving Projects
7.9. Command-Line Interface
7.10. Related Trainings
7.7.1. Exporting a Version-Compatible Compilation Database
7.7.2. Importing a Version-Compatible Compilation Database
7.7.3. Creating a Design Partition
7.7.4. Exporting a Design Partition
7.7.5. Reusing a Design Partition
7.7.6. Viewing Quartus Database File Information
7.7.7. Clearing Compilation Results
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4.6.2. Customizing IP Presets
You can optionally define and save a custom set of parameter settings as an IP preset, and then apply the preset whenever you add an instance of the IP component to any system.
Note: Preset pin assignments are not yet integrated with other Quartus Prime software pin assignment tools, such as Pin Planner, Assignment Editor, Chip Planner, and Interface Planner. These other Quartus Prime pin planning tools do not currently show or allow you to modify any preset pin assignments that you make in Platform Designer. You can only view and edit preset pin assignments in Platform Designer.
IP presets are only compatible with the version of the IP for which they were created. Applying a preset for a different version of the IP may result in invalid or incomplete parameterization. Platform Designer does not verify preset and IP version compatibility.
Follow these steps to save a custom IP preset:
- In IP Catalog, double-click any component to launch the parameter editor.
- To search for a specific preset to base initial settings, type a partial preset name in the search box.
- In the Presets tab, click New to specify the Preset name and Preset description.
- In the Board dropdown, specify the target board. The Default setting specifies the current board as the target board for this preset.
Note: You can specify multiple boards for a preset, provided that the preset parameters and assignments are applicable to all boards in the preset.
- Under Select parameters to include in the preset, enable or disable the parameters you want to include in the preset.
- Specify the path for the Preset file that preserves the collection of parameter settings. The location of the new .qprs preset file is added to the IP search path automatically.
Figure 16. Create New Preset
- Click Save.
- To apply the preset to an IP component, click Apply. Preset parameter values that match the current parameter settings appear in bold.