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Ixiasoft
1.1. L/H-Tile Hard IP for PCI Express* IP Cores for 23.2
1.2. L/H-Tile Hard IP for PCI Express* IP Cores for 23.1
1.3. L/H-Tile Hard IP for PCI Express* IP Cores for 21.4
1.4. L/H-Tile Hard IP for PCI Express* IP Cores for 21.3
1.5. L/H-Tile Hard IP for PCI Express IP Core v20.4
1.6. L/H-Tile Hard IP for PCI Express* IP Core v19.3
1.7. L/H-Tile Hard IP for PCI Express* IP Core v19.1
1.8. L/H-Tile Hard IP for PCI Express* IP Core v18.1.1
1.9. L/H-Tile Hard IP for PCI Express* IP Core v18.0
1.10. L/H-Tile Hard IP for PCI Express* IP Core v17.1
Visible to Intel only — GUID: sze1632352964457
Ixiasoft
1.4.2. L/H-Tile Avalon® Memory-mapped Hard IP for PCI Express* IP Core v22.2.0
Intel® Quartus® Prime Version | Description | Impact |
---|---|---|
21.3 | Removed duplicate Link port number (Root Port only) parameters from the Parameter Editor of the L/H-Tile Avalon® Memory-mapped Hard IP for PCI Express* IP. | The IP version number changed from 22.1.1 to 22.2.0. When migrating your design to 21.3, you can optionally regenerate your IP to take advantage of this enhancement. However, IP regeneration is not mandatory. |