Ethernet Link Inspector User Guide for Intel® Stratix® 10 Devices

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ID 683367
Date 7/01/2019
Public
Document Table of Contents
Document Table of Contents x
1. Overview of Ethernet Link Inspector for Intel® Stratix® 10 Devices 2. Setting Up the Ethernet Link Inspector 3. Functional Description 4. Ethernet Link Inspector User Guide Archives 5. Document Revision History for the Ethernet Link Inspector User Guide for Intel® Stratix® 10 Devices
1. Overview of Ethernet Link Inspector for Intel® Stratix® 10 Devices x
1.1. Features 1.2. Supported IP Cores and Devices
1.1. Features x
1.1.1. Link Monitor 1.1.2. Link Analysis
2. Setting Up the Ethernet Link Inspector x
2.1. System Requirements and Prerequisites 2.2. Running the Ethernet Link Inspector
2.1. System Requirements and Prerequisites x
2.1.1. System Requirements 2.1.2. Enabling Your Design For the Link Monitor
2.2. Running the Ethernet Link Inspector x
2.2.1. Running the Link Monitor 2.2.2. Running the Link Analysis
2.2.2. Running the Link Analysis x
2.2.2.1. Creating and Capturing Signal Tap File and Exporting Signal Tap Database as CSV File
3. Functional Description x
3.1. Link Monitor Module 3.2. Link Analysis Module
3.1. Link Monitor Module x
3.1.1. Link Monitor Tabs and Settings
3.2. Link Analysis Module x
3.2.1. Sequencer State Machine 3.2.2. Link Analysis Tabs and Settings
3.2.2. Link Analysis Tabs and Settings x
3.2.2.1. Sequencer State Machine Tab 3.2.2.2. Auto Neg Tab 3.2.2.3. Link Training Tab 3.2.2.4. Data Mode Tab 3.2.2.5. Help Tab
1. Overview of Ethernet Link Inspector for Intel® Stratix® 10 Devices
2. Setting Up the Ethernet Link Inspector
3. Functional Description
4. Ethernet Link Inspector User Guide Archives
5. Document Revision History for the Ethernet Link Inspector User Guide for Intel® Stratix® 10 Devices

2.2.2. Running the Link Analysis

Perform the following steps to launch the Link Analysis module.
Example Link Analysis Tab
  1. In the Intel® Quartus® Prime Pro Edition software, select Tools > System Debugging Tools > System Console to launch the system console.
  2. In the system console, click the Launch button under the Ethernet Link Inspector - Link Analysis section to run the Link Analysis module. The Ethernet Link Inspector - Link Analysis tab appears.
    Note: You can open multiple instances of the Link Analysis module simultaneously for different IPs.
  3. In the Ethernet Link Inspector - Link Analysis tab, select the target IP core from the drop-down box.
  4. Click the Select .csv file button to import the Signal Tap database (.csv) file. Refer to the Creating and Capturing Signal Tap Database and Exporting as CSV File section in this user guide to create the .csv file. In the Status Bar, make sure the directory to the imported database is correct.
  5. Click the Start Analysis button.
    Note: If you want the summary of the Ethernet link capture without using the Link Analysis, enter a report name and click Generate Report button to create a report (.csv) file. This feature is supported only for 10GBASE-KR PHY Intel® Stratix® 10 FPGA IP and Intel® Stratix® 10 Low Latency 40G Ethernet Intel® FPGA IP.
You can now use the Link Analysis to analyze the Signal Tap database.

Section Content
Creating and Capturing Signal Tap File and Exporting Signal Tap Database as CSV File

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