Intel® FPGA SDK for OpenCL™ Standard Edition: Programming Guide

ID 683342
Date 4/22/2019
Public
Document Table of Contents

2.2. Multistep Intel® FPGA SDK for OpenCL™ Standard Edition Design Flow

Choose the multistep Intel® FPGA SDK for OpenCL™ design flow if you want to iterate on your OpenCL kernel design to implement performance-improving optimizations .

The figure below outlines the stages in the SDK's design flow. The steps in the design flow serve as checkpoints for identifying functional errors and performance bottlenecks. They allow you to modify your OpenCL kernel code without performing a full compilation after each iteration.

Figure 5. The Multistep Intel® FPGA SDK for OpenCL™ Design Flow

The SDK's design flow includes the following steps:

  1. Emulation

    Assess the functionality of your OpenCL kernel by executing it on one or multiple emulation devices on an x86-64 host. For Linux systems, the Emulator offers symbolic debug support. Symbolic debug allows you to locate the origins of functional errors in your kernel code.

  2. Intermediate compilation

    The intermediate compilation step checks for syntactic errors. It then generates a .aoco file without building the hardware configuration file.

  3. Review HTML Report

    Review the <your_kernel_filename>/reports/report.html file of your OpenCL application to determine whether the estimated kernel performance data is acceptable. The HTML report also provides suggestions on how you can modify your kernel to increase performance.

  4. Profiling

    Instruct the Intel® FPGA SDK for OpenCL™ Offline Compiler to instrument performance counters in the Verilog code in the .aocx file. During execution, the performance counters collect performance information which you can then review in the Intel® FPGA dynamic profiler for OpenCL™ GUI.

  5. Full deployment

    If you are satisfied with the performance of your OpenCL kernel throughout the design flow, perform a full compilation. You can then execute the .aocx file on the FPGA.

For more information on HTML report and kernel profiling, refer to the Intel® FPGA SDK for OpenCL™ Best Practices Guide.