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1. SDI Audio Intel FPGA IP Overview
2. SDI Audio Intel FPGA IP Getting Started
3. SDI Audio Intel FPGA IP Functional Description
4. SDI Audio Intel FPGA IP Parameters
5. SDI Audio Intel FPGA IP Interface Signals
6. SDI Audio Intel FPGA IP Registers
7. SDI Audio Intel FPGA IP User Guide Archives
8. Document Revision History for the SDI Audio Intel FPGA IP User Guide
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3.3. SDI Clocked Audio Input IP Core
The Clocked Audio Input IP core converts clocked audio in AES formats to Avalon-ST audio.
For a typical AES input, for each channel, the clocked audio input function does the following operations:
- Creates a 192-bit validity word, user word and channel status word
- Presents the words as a control packet after the audio data packet