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1. SDI Audio Intel FPGA IP Overview
2. SDI Audio Intel FPGA IP Getting Started
3. SDI Audio Intel FPGA IP Functional Description
4. SDI Audio Intel FPGA IP Parameters
5. SDI Audio Intel FPGA IP Interface Signals
6. SDI Audio Intel FPGA IP Registers
7. SDI Audio Intel FPGA IP User Guide Archives
8. Document Revision History for the SDI Audio Intel FPGA IP User Guide
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1. SDI Audio Intel FPGA IP Overview
| Updated for: |
|---|
| Intel® Quartus® Prime Design Suite 22.2 |
| IP Version 19.1.2 |
The SDI Audio Intel FPGA IP cores ease the development of video and image processing designs. The SDI Audio Embed IP core allows audio and video signals to be combined into one digital signal. The SDI Audio Extract IP core allows audio and video signals in one digital signal to be split into separate signals.
The SDI Audio Intel FPGA IP cores are part of the IP Catalog Library, which is distributed with the Intel® Quartus® Prime software.
Note: The SDI Audio Intel® FPGA IP cores are available in the Intel® Quartus® Prime Pro Edition software from version 19.2 onwards for supported device families.
Note: The SDI Audio Intel® FPGA IP cores are available in the Intel® Quartus® Prime Standard Edition software version 18.1 for supported device families. Refer to the user guide for the previous IP core version (18.0) for information.
You can use the following cores to embed, extract or convert audio:
- Audio Embed Intel FPGA IP
- Audio Extract Intel FPGA IP
- Clocked Audio Input Intel FPGA IP
- Clocked Audio Output Intel FPGA IP
You can instantiate the SDI Audio Intel FPGA IP cores with the SDI and SDI II Intel FPGA IP cores. You can configure each Audio IP core at run time using an Avalon-MM slave interface, provided the relevant parameters are enabled.