Visible to Intel only — GUID: hco1410462606041
Ixiasoft
Visible to Intel only — GUID: hco1410462606041
Ixiasoft
11.9. Sink-Supported DPCD Locations
The following table describes the DPCD locations (or location groups) that are supported in DisplayPort sink instantiations.
Location Name |
Address |
Without GPU |
With GPU |
---|---|---|---|
DPCD_REV | 0x0000 |
Yes |
Yes |
MAX_LINK_RATE | 0x0001 |
Yes |
Yes |
MAX_LANE_COUNT | 0x0002 |
Yes |
Yes |
MAX_DOWNSPREAD | 0x0003 |
Yes |
Yes |
NORP | 0x0004 |
Yes |
Yes |
DOWNSTREAMPORT_PRESENT | 0x0005 |
Yes |
Yes |
MAIN_LINK_CHANNEL_CODING | 0x0006 |
Yes |
Yes |
DOWN_STREAM_PORT_COUNT | 0x0007 |
Yes |
Yes |
RECEIVE_PORT0_CAP_0 | 0x0008 |
Yes |
Yes |
RECEIVE_PORT0_CAP_1 | 0x0009 |
Yes |
Yes |
RECEIVE_PORT1_CAP_0 | 0x000A |
Yes |
Yes |
RECEIVE_PORT1_CAP_1 | 0x000B |
Yes |
Yes |
I2C_SPEED_CONTROL | 0x000C |
— |
Yes |
EDP_CONFIGURATION_CAP | 0x000D |
— |
Yes |
TRAINING_AUX_RD_INTERVAL | 0x000E |
— |
Yes |
ADAPTER_CAP | 0x000F |
— |
Yes |
FAUX_CAP | 0x0020 |
— |
Yes |
MST_CAP | 0x0021 |
— |
Yes |
NUMBER_OF_AUDIO_ENDPOINTS | 0x0022 |
— |
Yes |
GUID | 0x0030 |
Yes |
Yes |
DWN_STRM_PORTX_CAP | 0x0080 |
Yes |
Yes |
LINK_BW_SET | 0x0100 |
Yes |
Yes |
LANE_COUNT_SET | 0x0101 |
Yes |
Yes |
TRAINING_PATTERN_SET | 0x0102 |
Yes |
Yes |
TRAINING_LANE0_SET | 0x0103 |
Yes |
Yes |
TRAINING_LANE1_SET | 0x0104 |
Yes |
Yes |
TRAINING_LANE2_SET | 0x0105 |
Yes |
Yes |
TRAINING_LANE3_SET | 0x0106 |
Yes |
Yes |
DOWNSPREAD_CTRL | 0x0107 |
Yes |
Yes |
MAIN_LINK_CHANNEL_CODING_SET | 0x0108 |
Yes |
Yes |
I2C_SPEED_CONTROL | 0x0109 |
— |
Yes |
EDP_CONFIGURATION_SET | 0x010A |
— |
Yes |
LINK_QUAL_LANE0_SET | 0x010B |
— |
Yes |
LINK_QUAL_LANE1_SET | 0x010C |
— |
Yes |
LINK_QUAL_LANE2_SET | 0x010D |
— |
Yes |
LINK_QUAL_LANE3_SET | 0x010E |
— |
Yes |
TRAINING_LANE0_1_SET2 | 0x010F |
— |
Yes |
TRAINING_LANE2_3_SET2 | 0x0110 |
— |
Yes |
MSTM_CTRL | 0x0111 |
— |
Yes |
AUDIO_DELAY[7:0] | 0x0112 |
— |
Yes |
AUDIO_DELAY[15:8] | 0x0113 |
— |
Yes |
AUDIO_DELAY[23:6] | 0x0114 |
— |
Yes |
ADAPTER_CTRL | 0x01A0 |
— |
Yes |
BRANCH_DEVICE_CTRL | 0x01A1 |
— |
Yes |
PAYLOAD_ALLOCATE_SET | 0x01C0 |
— |
Yes |
PAYLOAD_ALLOCATE_START_TIME_SLOT | 0x01C1 |
— |
Yes |
PAYLOAD_ALLOCATE_TIME_SLOT_COUNT | 0x01C2 |
— | Yes |
SINK_COUNT | 0x0200 |
Yes |
Yes |
DEVICE_SERVICE_IRQ_VECTOR | 0x0201 |
Yes |
Yes |
LANE0_1_STATUS | 0x0202 |
Yes |
Yes |
LANE2_3_STATUS | 0x0203 |
Yes |
Yes |
LANE_ALIGN_STATUS_UPDATED | 0x0204 |
Yes |
Yes |
SINK_STATUS | 0x0205 |
Yes |
Yes |
ADJUST_REQUEST_LANE0_1 | 0x0206 |
Yes |
Yes |
ADJUST_REQUEST_LANE2_3 | 0x0207 |
Yes |
Yes |
SYMBOL_ERROR_COUNT_LANE0 | 0x0210 |
Yes |
Yes |
SYMBOL_ERROR_COUNT_LANE1 | 0x0212 |
Yes |
Yes |
SYMBOL_ERROR_COUNT_LANE2 | 0x0214 |
Yes |
Yes |
SYMBOL_ERROR_COUNT_LANE3 | 0x0216 |
Yes |
Yes |
TEST_REQUEST | 0x0218 | — |
Yes |
TEST_LINK_RATE | 0x0219 | — |
Yes |
TEST_LANE_COUNT | 0x0220 |
— |
Yes |
TEST_CRC_R_Cr | 0x0240 |
Yes |
— |
TEST_CRC_G_Y | 0x0242 |
Yes |
— |
TEST_CRC_B_Cb | 0x0244 |
Yes |
— |
TEST_SINK_MISC | 0x0246 |
Yes |
— |
PHY_TEST_PATTERN | 0x0248 | Yes |
Yes |
TEST_80BIT_CUSTOM_PATTERN (0x0250 to 0x0259) | 0x0250 | Yes |
Yes |
TEST_EDID_CHECKSUM | 0x0261 |
Yes |
— |
TEST_SINK | 0x0270 |
Yes |
Yes |
PAYLOAD_TABLE_UPDATE_STATUS | 0x02C0 |
— |
Yes |
VC_PAYLOAD_ID_SLOT_1_to_63 | 0x02C1 |
— |
Yes |
IEEE_OUI | 0x0300 |
— |
Yes |
IEEE_OUI | 0x0301 |
— |
Yes |
IEEE_OUI | 0x0302 |
— |
Yes |
DEVICE_IDENTIFICATION_STRING | 0x0303 |
— |
Yes |
HARDWARE_REVISION | 0x0309 |
— |
Yes |
FWSW_MAJOR | 0x030A |
— |
Yes |
FWSW_MINOR | 0x030B |
— |
Yes |
RESERVED | 0x030C |
— |
Yes |
RESERVED | 0x030D |
— |
Yes |
RESERVED | 0x030E |
— |
Yes |
RESERVED | 0x030F |
— |
Yes |
IEEE_OUI | 0x0400 |
— |
Yes |
IEEE_OUI | 0x0401 |
— |
Yes |
IEEE_OUI | 0x0402 |
— |
Yes |
DEVICE_IDENTIFICATION_STRING | 0x0403 |
— |
Yes |
HARDWARE_REVISION | 0x0409 |
— |
Yes |
FWSW_MAJOR | 0x040A |
— |
Yes |
FWSW_MINOR | 0x040B |
— | Yes |
RESERVED (0x040C to 0x04FF) | 0x040C |
— | Yes |
IEEE_OUI | 0x0500 |
Yes |
Yes |
IEEE_OUI | 0x0501 |
Yes |
Yes |
IEEE_OUI | 0x0502 |
Yes |
Yes |
DEVICE_IDENTIFICATION_STRING | 0x0503 |
— |
Yes |
HARDWARE_REVISION | 0x0509 |
— |
Yes |
FWSW_MAJOR | 0x050A |
— |
Yes |
FWSW_MINOR | 0x050B |
— |
Yes |
RESERVED (0x050C to 0x05FF) | 0x050C |
— |
Yes |
SET_POWER_STATE | 0x0600 |
Yes |
Yes |
EDP_DISPLAY_CONTROL | 0x0720 |
Yes |
Yes |
DOWN_REQ (0x1000 to 0x102F) | 0x1000 |
— |
Yes |
DOWN_REP (0x1400 to 0x142F) | 0x1400 |
— |
Yes |
SINK_COUNT_ESI | 0x2002 |
— |
Yes |
DEVICE_SERVICE_IRQ_VECTOR_ESI0 | 0x2003 |
— |
Yes |
DEVICE_SERVICE_IRQ_VECTOR_ESI1 | 0x2004 |
— |
Yes |
LINK_SERVICE_IRQ_VECTOR_ESI0 | 0x2005 |
— |
Yes |
LANE0_1_STATUS | 0x200C |
— |
Yes |
LANE2_3_STATUS_ESI | 0x200D |
— |
Yes |
LANE_ALIGN STATUS_UPDATED_ESI | 0x200E |
— |
Yes |
SINK_STATUS_ESI | 0x200F |
— |
Yes |