Visible to Intel only — GUID: hco1410462436759
Ixiasoft
Visible to Intel only — GUID: hco1410462436759
Ixiasoft
6.5.11. MSA Interface
The rxN_msa_conduit ports allow designs access to the MSA and VB-ID parameters on a top-level port. The following table shows the 217-bit port bundle assignments. The prefixes msa and vbid denote parameters from the MSA and Vertical Blank ID (VB-ID) packets, respectively.
The sink asserts bit msa_valid when all msa_ signals are valid and deasserts during MSA update. The sink assigns the MSA parameters to zero when it is not receiving valid video data.
The sink asserts the msa_lock bit when the MSA fields have been correctly formatted for the last 15 video frames. Because msa_lock changes state only when msa_valid = 1, you can use its rising edge to strobe new MSA values following an idle video period; for example, when the source changes video resolution. You can use its deasserted state to invalidate received video data.
The sink asserts bit vbid_strobe for one clock cycle when it detects the VB-ID and all vbid_ signals are valid to be read.
Bit |
Signal |
Description |
---|---|---|
216 |
msa_lock | 0 = MSA fields format error. 1 = MSA fields correctly formatted. |
215 |
vbid_strobe | 0 = VB-ID fields invalid, 1 = VB-ID fields valid. |
214:209 |
vbid_vbid[5:0] | VB-ID bit field:
|
208:201 |
vbid_Mvid[7:0] | Least significant 8 bits of Mvid for the video stream |
200:193 |
vbid_Maud[7:0] | Least significant 8 bits of Maud for the audio stream |
192 |
msa_valid | 0 = MSA fields are invalid or being updated, 1 = MSA fields are valid |
191:168 |
msa_Mvid[23:0] | Mvid value for the main video stream. Used for stream clock recovery from link symbol clock. |
167:144 |
msa_Nvid[23:0] | Nvid value for the main video stream. Used for stream clock recovery from link symbol clock. |
143:128 |
msa_Htotal[15:0] | Horizontal total of received video stream in pixels |
127:112 |
msa_Vtotal[15:0] | Vertical total of received video stream in lines |
111 |
msa_HSP | H-sync polarity 0 = Active high, 1 = Active low |
110:96 |
msa_HSW[14:0] | H-sync width in pixel count |
95:80 |
msa_Hstart[15:0] | Horizontal active start from H-sync start in pixels (H-sync width + Horizontal back porch) |
79:64 |
msa_Vstart[15:0] | Vertical active start from V-sync start in lines (V-sync width + Vertical back porch) |
63 |
msa_VSP | V-sync polarity 0 = Active high, 1 = Active low |
62:48 |
msa_VSW[14:0] | V-sync width in lines |
47:32 |
msa_Hwidth[15:0] | Active video width in pixels |
31:16 |
msa_Vheight[15:0] | Active video height in lines |
15:8 |
msa_MISC0[7:0] | The MISC0[7:1] and MISC1[7] fields indicate the color encoding format. The color depth is indicated in MISC0[7:5]:
For details about the encoding format, refer to the VESA DisplayPort Standard version 1.4. |
7:0 |
msa_MISC1[7:0] |