Early Power Estimator User Guide

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ID 683272
Date 7/16/2021
Public
Document Table of Contents
Document Table of Contents x
1. Early Power Estimator Overview 2. Setting Up the Early Power Estimator 3. Early Power Estimator Worksheets 4. Factors Affecting the Early Power Estimator Spreadsheet Accuracy A. Additional Information for Early Power Estimator User Guide
1. Early Power Estimator Overview x
1.1. Release Information 1.2. Power Model Status for Supported Device Families
2. Setting Up the Early Power Estimator x
2.1. System Requirements 2.2. Download and Install the Early Power Estimator 2.3. Estimating Power Consumption
2.2. Download and Install the Early Power Estimator x
2.2.1. Changing the Macro Security Level in Microsoft Excel 2003 2.2.2. Changing the Macro Security Level in Microsoft Excel 2007 2.2.3. Changing the Macro Security Level in Microsoft Excel 2010
2.3. Estimating Power Consumption x
2.3.1. Estimating Power Consumption Before Starting the FPGA Design 2.3.2. Estimating Power Consumption While Creating the FPGA Design 2.3.3. Estimating Power Consumption After Completing the FPGA Design
2.3.1. Estimating Power Consumption Before Starting the FPGA Design x
2.3.1.1. Entering Information into the Early Power Estimator
2.3.1.1. Entering Information into the Early Power Estimator x
2.3.1.1.1. Manually Entering Values
2.3.2. Estimating Power Consumption While Creating the FPGA Design x
2.3.2.1. Importing a File
2.3.2.1. Importing a File x
2.3.2.1.1. Generate the EPE File 2.3.2.1.2. Import Data into the EPE Spreadsheet
3. Early Power Estimator Worksheets x
3.1. Main Worksheet 3.2. Logic Worksheet 3.3. RAM Worksheet 3.4. DSP Worksheet 3.5. I/O Worksheet 3.6. PLL Worksheet 3.7. Clock Worksheet 3.8. HSDI Worksheet 3.9. XCVR Worksheet 3.10. HMC Worksheet 3.11. IP Worksheet 3.12. HPS Worksheet 3.13. Report Worksheet 3.14. Enpirion Worksheet
3.1. Main Worksheet x
3.1.1. Input Parameter 3.1.2. Thermal Power 3.1.3. Power Tree Design 3.1.4. Thermal Analysis
3.1.4. Thermal Analysis x
3.1.4.1. Not Using a Heat Sink 3.1.4.2. Using a Heat Sink
3.13. Report Worksheet x
3.13.1. Static Power and Dynamic Current per Voltage Rail 3.13.2. Power Up Current 3.13.3. Power Breakout for Multiple Voltage Supplies 3.13.4. Power Regulator Settings
4. Factors Affecting the Early Power Estimator Spreadsheet Accuracy x
4.1. Toggle Rate 4.2. Airflow 4.3. Temperature 4.4. Heat Sink
A. Additional Information for Early Power Estimator User Guide x
A.1. Document Revision History for Early Power Estimator User Guide
1. Early Power Estimator Overview
2. Setting Up the Early Power Estimator
3. Early Power Estimator Worksheets
4. Factors Affecting the Early Power Estimator Spreadsheet Accuracy
A. Additional Information for Early Power Estimator User Guide

3.9. XCVR Worksheet

The supported device families feature dedicated embedded circuitry transceiver channels. This section is only applicable for designs targeting the supported device families.

The power calculated in this section applies to the transceiver blocks, including the channels used and all circuitry used in the clock control unit (CCU). The I/O buffer power and PLL power for the transceivers are included in this section. Transmitters and receivers assume 100 Ω termination.

Each row in the XCVR worksheet represents a separate transceiver domain. Enter the following parameters for each transceiver domain:

  • Number of channels
  • Protocol used
  • Selected VCCA and VCCH_GXB voltage (for Arria V GZ, Stratix IV GX, and Stratix V only)
  • Selected VCCL_GXB, VCCR, and VCCT voltage
  • Transceiver block operation mode
  • Data rate (in Mbps)
  • VOD setting (in mV)
  • PLL sharing
  • PLL type
  • Pre-emphasis setting
  • Adaptive dispersion control engine (ADCE) setting
  • Decision feedback equalization (DFE) setting (for Arria V GZ and Stratix V only)
  • Equalizer stages (for Arria V GZ and Stratix V only)
  • Width of the parallel data bus
  • For certain modes, you must specify if you use the byte serializer, rate match FIFO setting, and 8B/10B encoder features.
Figure 23. XCVR Worksheet of the EPE Spreadsheet
Table 15.  XCVR Worksheet Information
Column Heading Description
Module Specify a name for the module in this column. This is an optional value.
# of Channels Enter the number of channels used in this transceiver domain. These channels are grouped together in one transceiver block or two adjacent transceiver blocks and clocked by one or more common PLLs. The number of channels allowed in each domain depends on the selected protocol.
Protocol

Enter the communication protocol or standard these transceivers implement. Choose from the drop-down list.

For custom protocols not listed in the drop-down list, choose Basic or Basic (PMA Direct) protocol and adjust other settings appropriately.

VCCA Voltage

Enter the voltage of the VCCA power rail used by the transceiver block.

This option is available for Arria V GZ, Stratix IV GX, and Stratix V devices only.

VCCH_GXB Voltage

Enter the voltage of the VCCH_GXB power rail used by the transceiver block.

This option is available for Arria V GZ, Stratix IV GX, and Stratix V devices only.

VCCL_GXB, VCCR, and VCCT Voltage Select the voltage for the VCCL_GXB, VCCR, and VCCT power rails.
Operation Mode Enter the operation mode implemented by the transceiver block. Options include:
  • Receiver and Transmitter
  • Receiver only
  • Transmitter only
Data Rate (Mbps) Enter the transceiver data rate (in Mbps).
VOD Setting Enter the VOD setting (mV) of the gigabit transceiver block (GXB) transmitter channel PMA. It is assumed that the transmitter uses a termination resistance of 100 Ω .
PLL Sharing Specify the number of transmitter PLLs that are shared by the transceiver channels on the same row. This value is ignored for Receiver-only channels. For device families that support using fPLLs as transmitter PLLs such as channels on a given row use only fPLLs as transmitter PLLs, enter 0 for PLL sharing and add appropriate number of fPLLs in the PLL worksheet.
PLL Type Select ATX or CMU for device families that support multiple transmitter PLL types. If the channel uses fPLL as transmitter PLL, enter 0 for PLL sharing and add appropriate number of PLLs in the PLL worksheet.
Pre-Emphasis Setting–Pre-Tap

Enter the pre-emphasis pre-tap setting used by the transmitter.

To enter this parameter, set the XCVR Page Mode section to Detailed.

Pre-Emphasis Setting–First Post-Tap

Enter the pre-emphasis first post-tap setting used by the transmitter.

To enter this parameter, set the XCVR Page Mode section to Detailed.

Pre-Emphasis Setting–Second Post-Tap

Enter the pre-emphasis second post-tap setting used by the transmitter.

To enter this parameter, set the XCVR Page Mode section to Detailed.

ADCE

Enter whether the ADCE is turned On or Off.

To enter this parameter, set the XCVR Page Mode section to Detailed.

DFE

Specify DFE mode as Manual or Triggered Adaption when DFE is used. The DFE is turned Off by default.

To enter this parameter, set the XCVR Page Mode section to Detailed.

Equalizer stages Select All stages Enabled or Bypass Stages 234. Bypass equalizer stages 2, 3, and 4 reduce power consumption of the transceiver channels.
Parallel Data Width

Enter the width of the parallel data bus going into each GXB transmitter channel PCS and coming out of each GXB receiver channel PCS.

To enter this parameter, set the XCVR Page Mode section to Detailed.

Byte Serializer Used

Enter whether or not the byte SERDES is used. If the byte serializer is used, the transceiver is in double-width mode. If it is not used, the transceiver is in single-width mode.

To enter this parameter, set the XCVR Page Mode section to Detailed.

Rate Match FIFO Used

Enter whether or not the rate matching FIFO is used.

To enter this parameter, set the XCVR Page Mode section to Detailed.

8B10B Encoder Used

Enter whether or not 8B/10B encoder/decoder is used.

To enter this parameter, set the XCVR Page Mode section to Detailed.

Channel Power (W) This shows the total power of the GXB transmitter channel PMA and GXB receiver channel PMA blocks for all channels (in watts). This value is automatically calculated.
CCU Power (W) This shows the total power of the GXB PLLs and control circuitry for all channels (in watts). This value is automatically calculated.
XCVR Power (W) This shows the sum of the channel power and CCU power (in watts). This value is automatically calculated.
PCS/HIP Power (W) This shows the total power of the GXB transmitter channel PCS, GXB receiver channel PCS, and PCIe hard IP blocks for all channels (in watts). This value is automatically calculated.
User Comments Enter any comments. This is an optional entry.
Values of some settings in the XCVR worksheet are restricted for one of the following reasons:
  • The setting value is restricted due to the selections made for other settings.
  • Changing the setting would not have a significant impact on power, given the selected values of other settings.

For more information about the transceiver architecture of the supported device families, refer to the “Transceiver Architecture” chapter in the respective device handbook.

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