AN 709: HPS SoC Boot Guide - Cyclone V SoC Development Kit

Download PDF
ID 683265
Date 1/27/2016
Public
Document Table of Contents
Document Table of Contents x
1. AN 709: HPS SoC Boot Guide - Cyclone V SoC Development Kit
1. AN 709: HPS SoC Boot Guide - Cyclone V SoC Development Kit x
1.1. Introduction 1.2. Boot Overview 1.3. Boot Duration 1.4. Boot Debugging 1.5. Boot Examples 1.6. Document Revision History
1.1. Introduction x
1.1.1. Prerequisite
1.2. Boot Overview x
1.2.1. Boot Flow 1.2.2. Boot Sources 1.2.3. Boot Clocks
1.2.1. Boot Flow x
1.2.1.1. Boot ROM 1.2.1.2. Preloader 1.2.1.3. Bootloader
1.2.2. Boot Sources x
1.2.2.1. Boot from SD/MMC 1.2.2.2. Boot from QSPI 1.2.2.3. Boot from NAND 1.2.2.4. Boot from FPGA 1.2.2.5. FPGA Fallback Boot 1.2.2.6. Boot from RAM on Warm Reset
1.3. Boot Duration x
1.3.1. Optimizing Boot Duration 1.3.2. Boot Duration Measurements
1.3.1. Optimizing Boot Duration x
1.3.1.1. Hardware Powerup Sequence 1.3.1.2. Boot ROM 1.3.1.3. Preloader 1.3.1.4. Bootloader 1.3.1.5. Linux Kernel 1.3.1.6. Init Scripts
1.4. Boot Debugging x
1.4.1. Boot ROM 1.4.2. Preloader 1.4.3. U-Boot
1.4.2. Preloader x
1.4.2.1. Debugging the Preloader from ARM DS-5 AE
1.5. Boot Examples x
1.5.1. Bare-Metal Application 1.5.2. Booting from SD/MMC – Custom Partition 1.5.3. Booting from SD/MMC – FAT Partition 1.5.4. Booting from QSPI Flash 1.5.5. Booting from FPGA
1.5.5. Booting from FPGA x
1.5.5.1. Overview 1.5.5.2. Hardware Design 1.5.5.3. Building and Running the Example
1. AN 709: HPS SoC Boot Guide - Cyclone V SoC Development Kit

1.5.5.3. Building and Running the Example

This section presents the steps required in order to build and run the boot from FPGA example.
Note: All the binaries are also provided with the archive file that accompanies this document.
To prevent the "Device Open Failed!" error message, ensure that you are operating in the following user modes:
  • Windows — "Administrator mode user"
  • Linux — "sudo mode"
  1. Build the sample bare-metal application or simply use the provided file hello-mkimage.bin directly.
  2. Compile the provided Booting from FPGHA Hardware Design in Intel® Quartus® Prime, to create the handoff information.
  3. Generate the Preloader based on the compiled hardware project. Select the following options:
    • Check the option spl.boot.BOOT_FROM_SDMMC
    • Uncheck the other boot options (spl.boot.BOOT_FROM_RAM, spl.boot.BOOT_FROM_QSPI, spl.boot.BOOT_FROM_NAND)
    • Uncheck the option spl.boot.FAT_SUPPORT. This notifies the Preloader to load the bare-metal application from the custom partition.
      Note: spl.boot.SDMMC_NEXT_BOOT_IMAGE = 0x40000. This is the location where the bare-metal application image needs to be stored.
    • Check the option spl.boot.SDRAM_SCRUBBING and spl.boot.SDRAM_SCRUB_REMAIN_REGION. This zeroes out the SDRAM, preventing any ECC errors to occur during bare-metal program execution.
    • Uncheck the option spl.boot.WATCHDOG_ENABLE. This is because we are not kicking the watchdog in our bare-metal application.
    • Check the option spl.boot.EXE_ON_FPGA.
  4. Compile the Preloader. This creates the Preloader executable.
  5. Convert the Preloader executable to hex file by using the following command in the Preloader folder: arm-altera-eabi-objcopy -O ihex --adjust-vma -0xc0000000 uboot-socfpga/spl/u-boot-spl preloader.hex
  6. Compile the hardware design again, to take into account the newly created hex file.
    Note: The hex file is expected to be located in the <hardware_design_folder>/software/spl_bsp/preloader.hex. This creates the file <hardware_design_folder>/output_files/soc_system.sof.
  7. Manually create an SD card with a custom partition with id=A2 using fdisk, or use the example SD card image that comes with SoC EDS:
    • Unzip the SD Card Image provided in the <SoCEDS installation folder>:\embedded\embeddedsw\socfpga\prebuilt_images\sd_card_linux_boot_image.tar.gz by using the command ‘tar -xzf <filename>’ from the Embedded Command Shell. This creates the file sd_card_linux_boot_image.img.
    • Use the free Win32DiskImager tool to write the file sd_card_linux_boot_image.img to an SD card.
  8. Write the Bare-metal application image to the SD card custom partition, using the SD card boot utility that is part of SoC EDS:
    • Start an Embedded Command Shell
    • Run the command “alt-boot-disk-util -a write -b hello-mkimage.bin -d <sd_card_drive_letter>”
  9. Configure the Cyclone V board to boot from FPGA by setting the BOOTSEL jumpers like this:
    • BOOTSEL0 (J28): left
    • BOOTSEL1 (J29): right
    • BOOTSEL2 (J30): right
  10. Connect the board to the PC using the USB serial connection, and start a serial terminal on the PC, using 115,200-8-N-1.
  11. Insert the SD card on the board.
  12. Power up the board.
    There should be nothing coming from the board on the serial terminal, since the FPGA is not configured, so the Boot ROM cannot jump to FPGA yet.
  13. Configure the FPGA by using the Intel® Quartus® Prime Programmer, with the (.sof) file.
    Note: The (.sof) file is already included in the archive that accompanies this document.
  14. Press the HPS Cold Reset button (S7).
  15. The serial console shows the Preloader being run from FPGA, then the bare-metal application being run from the SD card.
    Figure 17. Serial Console of Preloader Running from FPGA
Related Information
Level Two Title