AN 709: HPS SoC Boot Guide - Cyclone V SoC Development Kit

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ID 683265
Date 1/27/2016
Public
Document Table of Contents
Document Table of Contents x
1. AN 709: HPS SoC Boot Guide - Cyclone V SoC Development Kit
1. AN 709: HPS SoC Boot Guide - Cyclone V SoC Development Kit x
1.1. Introduction 1.2. Boot Overview 1.3. Boot Duration 1.4. Boot Debugging 1.5. Boot Examples 1.6. Document Revision History
1.1. Introduction x
1.1.1. Prerequisite
1.2. Boot Overview x
1.2.1. Boot Flow 1.2.2. Boot Sources 1.2.3. Boot Clocks
1.2.1. Boot Flow x
1.2.1.1. Boot ROM 1.2.1.2. Preloader 1.2.1.3. Bootloader
1.2.2. Boot Sources x
1.2.2.1. Boot from SD/MMC 1.2.2.2. Boot from QSPI 1.2.2.3. Boot from NAND 1.2.2.4. Boot from FPGA 1.2.2.5. FPGA Fallback Boot 1.2.2.6. Boot from RAM on Warm Reset
1.3. Boot Duration x
1.3.1. Optimizing Boot Duration 1.3.2. Boot Duration Measurements
1.3.1. Optimizing Boot Duration x
1.3.1.1. Hardware Powerup Sequence 1.3.1.2. Boot ROM 1.3.1.3. Preloader 1.3.1.4. Bootloader 1.3.1.5. Linux Kernel 1.3.1.6. Init Scripts
1.4. Boot Debugging x
1.4.1. Boot ROM 1.4.2. Preloader 1.4.3. U-Boot
1.4.2. Preloader x
1.4.2.1. Debugging the Preloader from ARM DS-5 AE
1.5. Boot Examples x
1.5.1. Bare-Metal Application 1.5.2. Booting from SD/MMC – Custom Partition 1.5.3. Booting from SD/MMC – FAT Partition 1.5.4. Booting from QSPI Flash 1.5.5. Booting from FPGA
1.5.5. Booting from FPGA x
1.5.5.1. Overview 1.5.5.2. Hardware Design 1.5.5.3. Building and Running the Example
1. AN 709: HPS SoC Boot Guide - Cyclone V SoC Development Kit

1.2.2. Boot Sources

The HPS can boot from one of the following sources, as selected by the BSEL pins:

  • SD/MMC
  • QSPI
  • NAND
  • FPGA

The following table presents the possible BSEL options, together with the actual jumper settings on the Cyclone V Development kit, rev D:

BSEL Description Cyclone V Dev Kit Switches
J28:BSEL0 J28:BSEL0 J28:BSEL0
0 Reserved Right Right Right
1 FPGA Left Right Right
2 1.8 V NAND - - -
3 3.3 V NAND - - -
4 1.8 V SD/MMC - - -
5 3.3 V SD/MMC Left Right Left
6 1.8 V SPI or quad SPI - - -
7 3.3 V SPI or quad SPI Left Left Left

There are four boot options:

  • Indirect execution - When booting from flash (SD/MMC/QSPI/NAND):
    1. The code is loaded by the Boot ROM from the flash to the OCRAM.
    2. Run the code from this location
  • Direct execution - When booting from FPGA, the Boot ROM simply jumps to an address in the FPGA address space.
  • FPGA fallback boot - If the selected boot mode fails, the Boot ROM tries to jump to a fallback image in the FPGA, if it exists.
  • RAM boot - If an Warm Boot, the System Manager can be configured so that the Boot ROM directly jumps to a location in OCRAM.

Section Content
Boot from SD/MMC
Boot from QSPI
Boot from NAND
Boot from FPGA
FPGA Fallback Boot
Boot from RAM on Warm Reset

Level Two Title