AN 709: HPS SoC Boot Guide - Cyclone V SoC Development Kit

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ID 683265
Date 1/27/2016
Public
Document Table of Contents
Document Table of Contents x
1. AN 709: HPS SoC Boot Guide - Cyclone V SoC Development Kit
1. AN 709: HPS SoC Boot Guide - Cyclone V SoC Development Kit x
1.1. Introduction 1.2. Boot Overview 1.3. Boot Duration 1.4. Boot Debugging 1.5. Boot Examples 1.6. Document Revision History
1.1. Introduction x
1.1.1. Prerequisite
1.2. Boot Overview x
1.2.1. Boot Flow 1.2.2. Boot Sources 1.2.3. Boot Clocks
1.2.1. Boot Flow x
1.2.1.1. Boot ROM 1.2.1.2. Preloader 1.2.1.3. Bootloader
1.2.2. Boot Sources x
1.2.2.1. Boot from SD/MMC 1.2.2.2. Boot from QSPI 1.2.2.3. Boot from NAND 1.2.2.4. Boot from FPGA 1.2.2.5. FPGA Fallback Boot 1.2.2.6. Boot from RAM on Warm Reset
1.3. Boot Duration x
1.3.1. Optimizing Boot Duration 1.3.2. Boot Duration Measurements
1.3.1. Optimizing Boot Duration x
1.3.1.1. Hardware Powerup Sequence 1.3.1.2. Boot ROM 1.3.1.3. Preloader 1.3.1.4. Bootloader 1.3.1.5. Linux Kernel 1.3.1.6. Init Scripts
1.4. Boot Debugging x
1.4.1. Boot ROM 1.4.2. Preloader 1.4.3. U-Boot
1.4.2. Preloader x
1.4.2.1. Debugging the Preloader from ARM DS-5 AE
1.5. Boot Examples x
1.5.1. Bare-Metal Application 1.5.2. Booting from SD/MMC – Custom Partition 1.5.3. Booting from SD/MMC – FAT Partition 1.5.4. Booting from QSPI Flash 1.5.5. Booting from FPGA
1.5.5. Booting from FPGA x
1.5.5.1. Overview 1.5.5.2. Hardware Design 1.5.5.3. Building and Running the Example
1. AN 709: HPS SoC Boot Guide - Cyclone V SoC Development Kit

1.2.2.6. Boot from RAM on Warm Reset

This scenario applies only for Warm resets. The Boot ROM can be instructed to directly jump to an image already loaded in OCRAM with an optional CRC check for that image.

The following registers located in sysmgr (romcodegrp and warmramgrp) are used to set up the Boot from RAM on Warm Reset:

  • enable - Set bit 0 to enable Boot from RAM on Warm reset.
  • datastart - Byte offset in OCRAM for the region to be CRC-validated. Needs to be 4 byte aligned.
  • length - Size of OCRAM area to be CRC-validated, in 4 byte words. Set to 0 to disable the CRC validation.
  • execution - Byte offset in OCRAM where to jump to.
  • crc - CRC value for the OCRAM area that is CRC-validated.
Note: When booting from RAM, the Boot ROM does not do any initialization, including clocking and it therefore ignores the CSEL pins.
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