Intel Agilex® 7 Embedded Memory User Guide

ID 683241
Date 6/26/2023
Public

A newer version of this document is available. Customers should click here to go to the newest version.

Document Table of Contents

2.6.4. Asynchronous/Synchronous Clears in Clocking Modes

In all clocking modes, asynchronous and synchronous clears are available only for output latches and output registers.

In all clocking modes, asynchronous clear is available for read address registers on simple dual-port and simple quad-port modes.