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2.1. Compilation Overview
2.2. Using the Compilation Dashboard
2.3. Design Netlist Infrastructure (Beta)
2.4. Design Synthesis
2.5. Design Place and Route
2.6. Incremental Optimization Flow
2.7. Fast Forward Compilation Flow
2.8. Full Compilation Flow
2.9. Exporting Compilation Results
2.10. Integrating Other EDA Tools
2.11. Synthesis Language Support
2.12. Compiler Optimization Techniques
2.13. Synthesis Settings Reference
2.14. Fitter Settings Reference
2.15. Design Compilation Revision History
2.9.1. Exporting a Version-Compatible Compilation Database
2.9.2. Importing a Version-Compatible Compilation Database
2.9.3. Creating a Design Partition
2.9.4. Exporting a Design Partition
2.9.5. Reusing a Design Partition
2.9.6. Viewing Quartus Database File Information
2.9.7. Clearing Compilation Results
3.1. Factors Affecting Compilation Results
3.2. Strategies to Reduce the Overall Compilation Time
3.3. Reducing Synthesis Time and Synthesis Netlist Optimization Time
3.4. Reducing Placement Time
3.5. Reducing Routing Time
3.6. Reducing Static Timing Analysis Time
3.7. Setting Process Priority
3.8. Reducing Compilation Time Revision History
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2.12.4. Enable Intermediate Fitter Snapshots
To save compilation time, the Compiler does not save the planned, placed, routed, or retimed snapshots by default during full compilation.
However, you can turn on Enable Intermediate Fitter Snapshots (Assignments > Settings > Compiler Settings) to generate and preserve snapshots for the Plan, Place, Route, and Retime stages any time you run full compilation. You can also run any intermediate Fitter stage independently to generate the snapshot for that stage.