AN 756: Altera GPIO to Altera PHYLite Design Implementation Guidelines

ID 683231
Date 5/08/2017
Public

1.4.1. Use Case 1: Source Synchronous I/O Interface

Example 1 shows how you can migrate the source synchronous I/O interface implemented using GPIO to the Altera PHYLite IP core.
Figure 3. Migration of Source Synchronous Output Interface Using GPIO (Output Path) to Altera PHYLite
Figure 4. Migration of Source Synchronous Input Interface Using GPIO (Input Path) to Altera PHYLite