Intel Agilex® 7 Hard Processor System Remote System Update User Guide

ID 683184
Date 6/09/2023
Public

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Document Table of Contents

4.1.2. Enabling HPS Watchdog to Trigger RSU

The tool offers the option of selecting what happens when you enable an HPS watchdog, but do not service it, and produces an HPS reset. The option is available as an HPS component property in Platform Designer, as shown below:

When the highlighted option is selected and an HPS watchdog is enabled and times out because it is not serviced, the SDM considers the current application image as a failure. The SDM then tries to load the next application image in the configuration pointer block, or the factory image if all application images fail. When the factory image also fails to configure, the SDM clears the FPGA and HPS and the device remains not configured.

Enabling the HPS watchdog flow is:
  1. You select the desired watchdog behavior in the Intel® Quartus® Prime project used to create the factory image SOF.
  2. Then the Intel® Quartus® Prime Programming File Generator takes the setting from the factory SOF file, and stores it in the decision firmware data section.
  3. The decision firmware then uses the data from that section to implement the selected behavior.
    Note: The behavior can be changed through RSU by updating the factory image using a SOF with a different setting.