ID
683136
Date
9/13/2023
Public
Visible to Intel only — GUID: sam1412835826251
Ixiasoft
Release Information for GPIO Intel® FPGA IP
GPIO Intel® FPGA IP Features
GPIO Intel® FPGA IP Data Paths
GPIO Intel® FPGA IP Interface Signals
Verifying Resource Utilization and Design Performance
GPIO Intel® FPGA IP Parameter Settings
Register Packing
GPIO Intel® FPGA IP Timing
GPIO Intel® FPGA IP Design Examples
IP Migration Flow for Arria® V, Cyclone® V, and Stratix® V Devices
Intel® Arria® 10 and Intel® Cyclone® 10 GX GPIO Intel® FPGA IP User Guide Archives
Document Revision History for GPIO Intel® FPGA IP User Guide: Intel® Arria® 10 and Intel® Cyclone® 10 GX Devices
Visible to Intel only — GUID: sam1412835826251
Ixiasoft
GPIO Intel® FPGA IP User Guide: Intel® Arria® 10 and Intel® Cyclone® 10 GX Devices
Updated for: |
---|
Intel® Quartus® Prime Design Suite 23.2 |
IP Version 21.0.0 |
The GPIO Intel® FPGA IP core supports the general purpose I/O (GPIO) features and components. You can use GPIOs in general applications that are not specific to transceivers, memory interfaces, or LVDS.
The GPIO IP core is available for Intel® Arria® 10 and Intel® Cyclone® 10 GX devices only. If you are migrating designs from Stratix® V, Arria® V, or Cyclone® V devices, you must migrate the ALTDDIO_IN, ALTDDIO_OUT, ALTDDIO_BIDIR, or ALTIOBUF IP cores.
Section Content
Release Information for GPIO Intel FPGA IP
GPIO Intel FPGA IP Features
GPIO Intel FPGA IP Data Paths
GPIO Intel FPGA IP Interface Signals
Verifying Resource Utilization and Design Performance
GPIO Intel FPGA IP Parameter Settings
Register Packing
GPIO Intel FPGA IP Timing
GPIO Intel FPGA IP Design Examples
IP Migration Flow for Arria V, Cyclone V, and Stratix V Devices
Intel Arria 10 and Intel Cyclone 10 GX GPIO Intel FPGA IP User Guide Archives
Document Revision History for GPIO Intel FPGA IP User Guide: Intel Arria 10 and Intel Cyclone 10 GX Devices
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