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Release Information for GPIO Intel® FPGA IP
GPIO Intel® FPGA IP Features
GPIO Intel® FPGA IP Data Paths
GPIO Intel® FPGA IP Interface Signals
Verifying Resource Utilization and Design Performance
GPIO Intel® FPGA IP Parameter Settings
Register Packing
GPIO Intel® FPGA IP Timing
GPIO Intel® FPGA IP Design Examples
IP Migration Flow for Arria® V, Cyclone® V, and Stratix® V Devices
Intel® Arria® 10 and Intel® Cyclone® 10 GX GPIO Intel® FPGA IP User Guide Archives
Document Revision History for GPIO Intel® FPGA IP User Guide: Intel® Arria® 10 and Intel® Cyclone® 10 GX Devices
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Verifying Resource Utilization and Design Performance
You can refer to the Intel® Quartus® Prime compilation reports to get details about the resource usage and performance of your design.
- From the Intel® Quartus® Prime menu, select Processing > Start Compilation to run a full compilation.
- Wait for the compilation to complete.
- From the Intel® Quartus® Prime menu, select Processing > Compilation Report.
- Using the Table of Contents, navigate to Fitter > Resource Section.
- To view the resource usage information, select Resource Usage Summary.
- To view the resource utilization information, select Resource Utilization by Entity.