GPIO Intel® FPGA IP User Guide: Intel® Arria® 10 and Intel® Cyclone® 10 GX Devices

ID 683136
Date 1/25/2022
Public

A newer version of this document is available. Customers should click here to go to the newest version.

Document Table of Contents

IP Migration Flow for Arria® V, Cyclone® V, and Stratix® V Devices

The IP migration flow allows you to migrate the ALTDDIO_IN, ALTDDIO_OUT, ALTDDIO_BIDIR, and ALTIOBUF IP cores of Arria® V, Cyclone® V, and Stratix® V devices to the GPIO IP core of Intel® Arria® 10 and Intel® Cyclone® 10 GX devices.

This IP migration flow configures the GPIO IP core to match the settings of the ALTDDIO_IN, ALTDDIO_OUT, ALTDDIO_BIDIR, and ALTIOBUF IP cores, allowing you to regenerate the IP core.

Note: Some IP cores support the IP migration flow in specific modes only. If your IP core is in a mode that is not supported, you may need to run the IP Parameter Editor for the GPIO IP core and configure the IP core manually.