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1. Intel® Agilex™ SEU Mitigation Overview
2. Intel® Agilex™ CRAM Error Mitigation
3. Secure Device Manager ECC and SmartVID Errors Detection
4. Intel® Agilex™ SEU Mitigation Implementation Guides
5. IP and Software References
6. Intel® Agilex™ SEU Mitigation User Guide Archives
7. Document Revision History for the Intel® Agilex™ SEU Mitigation User Guide
4.6.1. Launching and Setting Up the Fault Injection Debugger
4.6.2. Configuring Your Device using a Software Object File (.sof)
4.6.3. Constraining Regions for Fault Injection
4.6.4. Injecting Errors to Random Locations
4.6.5. Injecting Errors to Specific Locations
4.6.6. Injecting Double Adjacent Errors
4.6.7. Injecting SDM ECC Errors
4.6.8. Analyzing SEU or SDM ECC Errors Using Signal Tap
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3.1. SDM ECC Error Message Bits
The SDM ECC error message bits store the error message when the Intel® Agilex™ detects an SDM ECC error.
The SDM ECC error message contains information about the sector address and type of the error. You can retrieve the contents of the error message from the generic_sdm_data_out signal of the Advanced SEU Detection Intel® FPGA IP.
Name | Width | Bit | Description |
---|---|---|---|
Sector address (Most significant 32-bit word in generic_sdm_data_out signal |
32 | 31:24 | Reserved |
23:16 | Address of sector with error | ||
15:8 | Reserved | ||
7:4 | Error type:
|
||
3:0 | Reserved | ||
Error data (Least significant 32-bit word in generic_sdm_data_out signal) |
32 | 31:29 | SDM ECC error type: |
28 | Correction Status:
|
||
27:0 | Reserved |
Note: For uncorrectable SDM ECC error, Intel® recommends that you reconfigure the Intel® Agilex™ device.
2 Application Interface Block (AIB) only.