AN 736: Nios II Processor Booting From Altera Serial Flash (EPCQ)

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ID 683104
Date 5/20/2016
Public
Document Table of Contents
Document Table of Contents x
1. Nios II Processor Booting From Altera Serial Flash (EPCQ)
1. Nios II Processor Booting From Altera Serial Flash (EPCQ) x
1.1. Definitions 1.2. Description of the Altera Serial Flash Controller 1.3. Scenarios for Booting Nios II from EPCQ Flash 1.4. Nios II Processor Configuration and Boot Flow 1.5. Steps to Build a Bootable System 1.6. EPCQ HAL Driver 1.7. Nios II Processor Booting Elements 1.8. Revision History for Nios II Booting From Altera Serial Flash (EPCQ)
1.3. Scenarios for Booting Nios II from EPCQ Flash x
1.3.1. Nios II Processor Application Execute-In-Place from EPCQ Flash 1.3.2. Nios II Processor Application Copied from EPCQ Flash to RAM
1.5. Steps to Build a Bootable System x
1.5.1. Design 1.5.2. Configuration and Compilation 1.5.3. BSP Editor Settings 1.5.4. Application 1.5.5. Programming Files Conversion 1.5.6. Configuration for EPCQ Programming 1.5.7. Download 1.5.8. Reset and Boot
1.5.2. Configuration and Compilation x
1.5.2.1. Reset and Exception Vector Settings for Nios® II Execute-In-Place Method 1.5.2.2. Reset and Exception Vector Settings for Nios II Boot Copier Method
1.7. Nios II Processor Booting Elements x
1.7.1. Memcpy-based Nios II Boot Copier
1. Nios II Processor Booting From Altera Serial Flash (EPCQ)

1.5.5. Programming Files Conversion

  1. In the Intel® Quartus® Prime software, go to File > Convert Programming Files to open the Convert Programming File tool.
  2. Under Output programming file section, set the following items:
    1. Programming file type: JTAG Indirect Configuration File (.jic)
    2. Configuration device: Select according to your EPCQ type
    3. Mode: Active Serial
    4. File name: You may select your preferred path for the output file (.jic). By default this is generated under your project root directory.
    5. Keep the default settings for Create Memory Map File and Create config data RPD.
    Figure 11. Convert Programming File Settings
  3. Under Input files to convert section:
    1. Select Flash Loader, then Add Device to select the FPGA device that you are using. Click OK when you are done.
    2. Select SOF Data, then Add File to choose the *.sof file generated by Quartus II compilation.
    3. Click on the *.sof file that you have just added. Next, select Properties and enable Compression.
    4. Click on SOF Data and select Properties. The SOF Data Properties window opens. Under Address mode for selected pages, select Start and set the start address (32-bit hexadecimal). If using a Cyclone® V SoC development board, set the start address to 0x0 to avoid a "size exceeds memory capacity" error.
      Figure 12. SOF Data Properties
    5. Click OK to close the window.
    6. Select Add Hex Data to open the Hex Data Properties window. Select the Absolute addressing button and browse to the HEX file location. Click OK when you are done.
      Note: You may select Relative addressing if you would like to set a relative address to the reset vector offset (0x01E00000) you configured earlier. For example, setting a start address of 0x01F00000 for the relative addressing mode changes the start address to 0x3D00000.
      Figure 13. HEX Data Properties
    7. Select Generate to generate the *.jic programming file.
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