AN 780: Compiling and Customizing an Intel® Arria® 10 Custom Platform for OpenCL*

ID 683045
Date 10/30/2018
Public
Document Table of Contents

1.7.3. Updating the Top-Level I/O Ring with the Modified board.qsys and freeze_wrapper.v Files

Add ports and signals to the board and freeze_wrapper instances in the top.v file.
  1. Open the top.v file in the Intel® Quartus® Prime Pro Edition software.
  2. Add the new ports to the board instance.
  3. Add the new ports to the freeze_wrapper instance.
  4. Add signal (wires) to connect the board instance to the freeze_wrapper instance.
  5. Save the top.v file.
  6. In the Intel® Quartus® Prime Pro Edition software, run Analysis and Synthesis to check the syntax of your RTL and fix any errors.
Figure 11. RTL Netlist of the New Board Interface Connected to the New Freeze Wrapper