Intel® Quartus® Prime Pro Edition User Guide: Programmer

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ID 683039
Date 9/26/2022
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Document Table of Contents
Document Table of Contents x
1. Intel® Quartus® Prime Programmer User Guide 2. Using the Intel® Quartus® Prime Programmer 3. Using the HPS Flash Programmer A. Intel® Quartus® Prime Pro Edition User Guide: Programmer Document Archive B. Intel® Quartus® Prime Pro Edition User Guides
1. Intel® Quartus® Prime Programmer User Guide x
1.1. Generating Primary Device Programming Files 1.2. Generating Secondary Programming Files 1.3. Enabling Bitstream Security for Intel® Stratix® 10 and Intel® Agilex™ Devices 1.4. Enabling Bitstream Encryption or Compression for Intel® Arria® 10 and Intel® Cyclone® 10 GX Devices 1.5. Generating Programming Files for Partial Reconfiguration 1.6. Generating Programming Files for Intel® FPGA Devices with Hard Processor Systems 1.7. Scripting Support 1.8. Generating Programming Files Revision History
1.2. Generating Secondary Programming Files x
1.2.1. Generating Secondary Programming Files (Programming File Generator) 1.2.2. Generating Secondary Programming Files (Convert Programming File Dialog Box) 1.2.3. Generating Secondary Programming Files (Settings: Programming Files Dialog Box)
1.2.1. Generating Secondary Programming Files (Programming File Generator) x
1.2.1.1. Configuration Modes (Programming File Generator) 1.2.1.2. Secondary Programming Files (Programming File Generator)
1.2.2. Generating Secondary Programming Files (Convert Programming File Dialog Box) x
1.2.2.1. Secondary Programming Files (Convert Programming Files) 1.2.2.2. Configuration Modes (Convert Programming Files) 1.2.2.3. Debugging the Configuration (Convert Programming Files)
1.3. Enabling Bitstream Security for Intel® Stratix® 10 and Intel® Agilex™ Devices x
1.3.1. Enabling Bitstream Authentication (Programming File Generator) 1.3.2. Specifying Additional Physical Security Settings (Programming File Generator) 1.3.3. Enabling Bitstream Encryption (Programming File Generator)
1.5. Generating Programming Files for Partial Reconfiguration x
1.5.1. Generating PR Bitstream Files 1.5.2. Partial Reconfiguration Bitstream Compatibility Checking 1.5.3. Raw Binary Programming File Byte Sequence Transmission Examples 1.5.4. Generating a Merged .pmsf File from Multiple .pmsf Files ( Intel® Arria® 10 and Intel® Cyclone® 10 GX Designs)
1.6. Generating Programming Files for Intel® FPGA Devices with Hard Processor Systems x
1.6.1. Generating Programming Files for HPS Boot First Boot Flows 1.6.2. Generating Programming Files for FPGA Configuration First Boot Flows
1.7. Scripting Support x
1.7.1. quartus_pfg Command Line Tool 1.7.2. quartus_cpf Command Line Tool
1.7.2. quartus_cpf Command Line Tool x
1.7.2.1. Generating a Partial-Mask SRAM Object File using a Mask Settings File and a SRAM Object File
2. Using the Intel® Quartus® Prime Programmer x
2.1. Intel® Quartus® Prime Programmer 2.2. Programming and Configuration Modes 2.3. Basic Device Configuration Steps 2.4. Specifying the Programming Hardware Setup 2.5. Programming with Flash Loaders 2.6. Verifying the Programming File Source with Project Hash 2.7. Using PR Bitstream Security Verification ( Intel® Stratix® 10 Designs) 2.8. Stand-Alone Programmer 2.9. Programmer Settings Reference 2.10. Scripting Support 2.11. Using the Intel® Quartus® Prime Programmer Revision History
2.4. Specifying the Programming Hardware Setup x
2.4.1. JTAG Chain Debugger Tool 2.4.2. Editing the Details of an Unknown Device 2.4.3. Running JTAG Daemon with Linux
2.4.1. JTAG Chain Debugger Tool x
2.4.1.1. JTAG Chain Integrity Tab 2.4.1.2. JTAG Chain Debugging Tab
2.5. Programming with Flash Loaders x
2.5.1. Specifying Flash Partitions 2.5.2. Full Erase of Flash Memory Sectors
2.6. Verifying the Programming File Source with Project Hash x
2.6.1. Obtaining Project Hash for Intel® Arria® 10 Devices
2.8. Stand-Alone Programmer x
2.8.1. Stand-Alone Programmer Memory Consumption
2.9. Programmer Settings Reference x
2.9.1. Device & Pin Options Dialog Box 2.9.2. More Security Options Dialog Box 2.9.3. Output Files Tab Settings (Programming File Generator) 2.9.4. Input Files Tab Settings (Programming File Generator) 2.9.5. Bitstream Co-Signing Security Settings (Programming File Generator) 2.9.6. Configuration Device Tab Settings 2.9.7. Add Partition Dialog Box (Programming File Generator) 2.9.8. Add Filesystem Dialog Box (Programming File Generator) 2.9.9. Convert Programming File Dialog Box 2.9.10. Compression and Encryption Settings (Convert Programming File) 2.9.11. SOF Data Properties Dialog Box (Convert Programming File) 2.9.12. Select Devices (Flash Loader) Dialog Box
2.10. Scripting Support x
2.10.1. The jtagconfig Debugging Tool
3. Using the HPS Flash Programmer x
3.1. HPS Flash Programmer Command-Line Utility 3.2. How the HPS Flash Programmer Works 3.3. Using the Flash Programmer from the Command Line 3.4. Supported Memory Devices 3.5. HPS Flash Programmer User Guide Revision History
3.3. Using the Flash Programmer from the Command Line x
3.3.1. HPS Flash Programmer 3.3.2. HPS Flash Programmer Command Line Examples
1. Intel® Quartus® Prime Programmer User Guide
2. Using the Intel® Quartus® Prime Programmer
3. Using the HPS Flash Programmer
A. Intel® Quartus® Prime Pro Edition User Guide: Programmer Document Archive
B. Intel® Quartus® Prime Pro Edition User Guides

1.2.2. Generating Secondary Programming Files (Convert Programming File Dialog Box)

You can use the Convert Programming File dialog box to generate secondary programming files for alternative device programming methods. For example, generating the .jic file for flash programming, the .rbf file for partial reconfiguration, or the .rpd file for a third-party programmer configuration.
Convert Programming File Dialog Box

The options available in the Convert Programming File dialog box change dynamically, according to your device and configuration mode selection.

  1. Generate the primary programming files for your design, as Generating Primary Device Programming Files describes.
  2. Click File > Convert Programming Files.
  3. Under Output programming file, select the Programming file type that you want to generate. Secondary Programming Files (Convert Programming Files) describes all file options.
  4. Specify the File name and output directory (…) for the file that you generate.
  5. For the configuration Mode, select Active Serial x4 or Active Serial. Configuration Modes (Convert Programming Files) describes all modes.
    Note: Intel® Stratix® 10 devices support only Active Serial x4.
  6. To specify the Configuration device, click the (…) button to select a supported flash memory device and predefined programming flow. When you select a predefined device, you cannot modify any setting. Alternatively, click <<new device>> to define a new flash memory device and programming flow. Configuration Device Tab Settings describes all settings.
    Figure 8. Configuration Device Dialog Box
  7. Under Input files to convert, select the SOF Data item, and then click the Add File button. Specify the .sof file that contains the configuration bitstream data. To include raw data, click Add Hex Data and specify a .hex file.
  8. To enable bitstream compression or encryption security settings, select the .sof file and click Properties, as Enabling Bitstream Encryption or Compression for Intel Arria 10 and Intel Cyclone 10 GX Devices describes.
  9. Select the Flash Loader text, and then click the Add Device button. Select the device that controls loading of the flash device.
    Figure 9. Selecting the Flash Loader Device
  10. After you specify all options in the Convert Programming File dialog box, click the Generate button to create the files.

Section Content
Secondary Programming Files (Convert Programming Files)
Configuration Modes (Convert Programming Files)
Debugging the Configuration (Convert Programming Files)

Level Two Title