F-Tile Ethernet Intel® FPGA Hard IP User Guide

ID 683023
Date 6/20/2022
Public

A newer version of this document is available. Customers should click here to go to the newest version.

Document Table of Contents

7.3.1. RX MAC Avalon ST Client Interface with Disabled Preamble Passthrough

Table 37.  RX MAC Field Positions in o_rx_data with Preamble Passthrough Disabled
100GE

o_rx_data

40GE/50GE

o_rx_data

10GE/25GE

o_rx_data

MAC Field Note
[511:504] [127:120] [63:56] Dest Addr[47:40] The first octet of the Destination Address, follows Start Frame Delimiter (SFD).
[503:496] [119:112] [55:48] Dest Addr[39:32]
[495:488] [111:104] [47:40] Dest Addr[31:24]  
[495:480] [103:96] [39:32] Dest Addr[23:16]  
[479:472] [95:88] [31:24] Dest Addr[15:8]  
[471:464] [87:80] [23:16] Dest Addr[7:0]  
[463:456] [79:72] [15:8] Src Addr[47:40]  
[455:448] [71:64] [7:0] Src Addr[39:32]  
[447:440] [63:56] [63:56] Src Addr[31:24]  
[439:432] [55:48] [55:48] Src Addr[23:16]  
[431:424] [47:40] [47:40] Src Addr[15:8]  
[423:416] [39:32] [39:32] Src Addr[7:0]  
[415:408] [31:24] [31:24] Length/Type[15:8]
[407:400] [23:16] [23:16] Length/Type[7:0]
[399:0] [15:0] [15:0]
In the table above, the byte order on the bus and the data bit order follow the TX MAC Avalon ST client interface. For example,
  • For 100GE, the first received bit after the SFD was bit 504, i.e. bit 0 of the first received byte.
  • For 40GE/50GE, the first bit of the first received byte is bit 120.
  • For 10GE/25GE, the first bit of the first received byte that is bit 56.