Visible to Intel only — GUID: ixx1540272363138
Ixiasoft
1. Overview
2. Use Cases
3. Quad SPI Flash Layout
4. Intel® Quartus® Prime Software and Tool Support
5. Software Support
6. Flash Corruption - Detection and Recovery
7. Remote System Update Example
8. Version Compatibility Considerations
9. Using RSU with HPS First
A. Configuration Flow Diagrams
B. RSU Status and Error Codes
C. U-Boot RSU Reference Information
D. LIBRSU Reference Information
E. Combined Application Images
10. Document Revision History for the Intel® Stratix® 10 SoC Remote System Update User Guide
2.1. Manufacturing
2.2. Application Image Boot
2.3. Factory Image Boot
2.4. Modifying the List of Application Images
2.5. Querying RSU Status
2.6. Loading a Specific Image
2.7. Protected Access to Flash
2.8. Remote System Update Watchdog
2.9. RSU Notify
2.10. Updating the Factory Image
2.11. Updating the Decision Firmware
2.12. Retrying when Configuration Fails
2.13. Querying the Decision Firmware Version
7.2.1. Setting up the Environment
7.2.2. Building the Hardware Projects
7.2.3. Building Arm* Trusted Firmware
7.2.4. Building U-Boot
7.2.5. Creating the Initial Flash Image
7.2.6. Creating the Application Image
7.2.7. Creating the Factory Update Image
7.2.8. Creating the Decision Firmware Update Image
7.2.9. Building Linux*
7.2.10. Building ZLIB
7.2.11. Building LIBRSU and RSU Client
7.2.12. Building the Root File System
7.2.13. Building the SD Card
C.6.1. rsu_init
C.6.2. rsu_exit
C.6.3. rsu_slot_count
C.6.4. rsu_slot_by_name
C.6.5. rsu_slot_get_info
C.6.6. rsu_slot_size
C.6.7. rsu_slot_priority
C.6.8. rsu_slot_erase
C.6.9. rsu_slot_program_buf
C.6.10. rsu_slot_program_factory_update_buf
C.6.11. rsu_slot_program_buf_raw
C.6.12. rsu_slot_verify_buf
C.6.13. rsu_slot_verify_buf_raw
C.6.14. rsu_slot_enable
C.6.15. rsu_slot_disable
C.6.16. rsu_slot_load
C.6.17. rsu_slot_load_factory
C.6.18. rsu_slot_rename
C.6.19. rsu_slot_delete
C.6.20. rsu_slot_create
C.6.21. rsu_status_log
C.6.22. rsu_notify
C.6.23. rsu_clear_error_status
C.6.24. rsu_reset_retry_counter
C.6.25. rsu_dcmf_version
C.6.26. rsu_max_retry
C.6.27. rsu_dcmf_status
C.6.28. rsu_create_empty_cpb
C.6.29. rsu_restore_cpb
C.6.30. rsu_save_cpb
C.6.31. rsu_restore_spt
C.6.32. rsu_save_spt
C.6.33. rsu_running_factory
C.7.1. dtb
C.7.2. list
C.7.3. slot_by_name
C.7.4. slot_count
C.7.5. slot_disable
C.7.6. slot_enable
C.7.7. slot_erase
C.7.8. slot_get_info
C.7.9. slot_load
C.7.10. slot_load_factory
C.7.11. slot_priority
C.7.12. slot_program_buf
C.7.13. slot_program_buf_raw
C.7.14. slot_program_factory_update_buf
C.7.15. slot_rename
C.7.16. slot_delete
C.7.17. slot_create
C.7.18. slot_size
C.7.19. slot_verify_buf
C.7.20. slot_verify_buf_raw
C.7.21. status_log
C.7.22. update
C.7.23. notify
C.7.24. clear_error_status
C.7.25. reset_retry_counter
C.7.26. display_dcmf_version
C.7.27. display_dcmf_status
C.7.28. display_max_retry
C.7.29. restore_spt
C.7.30. save_spt
C.7.31. create_empty_cpb
C.7.32. restore_cpb
C.7.33. save_cpb
C.7.34. check_running_factory
D.6.1. librsu_init
D.6.2. librsu_exit
D.6.3. rsu_slot_count
D.6.4. rsu_slot_by_name
D.6.5. rsu_slot_get_info
D.6.6. rsu_slot_size
D.6.7. rsu_slot_priority
D.6.8. rsu_slot_erase
D.6.9. rsu_slot_program_buf
D.6.10. rsu_slot_program_factory_update_buf
D.6.11. rsu_slot_program_file
D.6.12. rsu_slot_program_factory_update_file
D.6.13. rsu_slot_program_buf_raw
D.6.14. rsu_slot_program_file_raw
D.6.15. rsu_slot_verify_buf
D.6.16. rsu_slot_verify_file
D.6.17. rsu_slot_verify_buf_raw
D.6.18. rsu_slot_verify_file_raw
D.6.19. rsu_slot_program_callback
D.6.20. rsu_slot_program_callback_raw
D.6.21. rsu_slot_verify_callback
D.6.22. rsu_slot_verify_callback_raw
D.6.23. rsu_slot_copy_to_file
D.6.24. rsu_slot_enable
D.6.25. rsu_slot_disable
D.6.26. rsu_slot_load_after_reboot
D.6.27. rsu_slot_load_factory_after_reboot
D.6.28. rsu_slot_rename
D.6.29. rsu_slot_delete
D.6.30. rsu_slot_create
D.6.31. rsu_status_log
D.6.32. rsu_notify
D.6.33. rsu_clear_error_status
D.6.34. rsu_reset_retry_counter
D.6.35. rsu_dcmf_version
D.6.36. rsu_max_retry
D.6.37. rsu_dcmf_status
D.6.38. rsu_save_spt
D.6.39. rsu_restore_spt
D.6.40. rsu_save_cpb
D.6.41. rsu_create_empty_cpb
D.6.42. rsu_restore_cpb
D.6.43. rsu_running_factory
D.7.1. count
D.7.2. list
D.7.3. size
D.7.4. priority
D.7.5. enable
D.7.6. disable
D.7.7. request
D.7.8. request-factory
D.7.9. erase
D.7.10. add
D.7.11. add-factory-update
D.7.12. add-raw
D.7.13. verify
D.7.14. verify-raw
D.7.15. copy
D.7.16. log
D.7.17. notify
D.7.18. clear-error-status
D.7.19. reset-retry-counter
D.7.20. display-dcmf-version
D.7.21. display-dcmf-status
D.7.22. display-max-retry
D.7.23. create-slot
D.7.24. delete-slot
D.7.25. restore-spt
D.7.26. save-spt
D.7.27. create-empty-cpb
D.7.28. restore-cpb
D.7.29. save-cpb
D.7.30. check-running-factory
D.7.31. help
Visible to Intel only — GUID: ixx1540272363138
Ixiasoft
7.2.2. Building the Hardware Projects
Create four different hardware projects, based on the GHRD from GitHub with a few changes:
- Change the boot mode to FPGA first
- Use a different ID in the SystemID component, to make the binaries for each project slightly different.
- Change the behavior of watchdog timeout, to trigger an RSU event.
- Set the max retry parameter to 3, so that each application image and the factory image are tried up to three time when configuration failures occur.
The commands to create and compile the projects are listed below:
cd $TOP_FOLDER
# compile hardware designs: 0-factory, 1,2-applications, 3-factory update
rm -rf hw && mkdir hw && cd hw
wget https://github.com/altera-opensource/ghrd-socfpga/archive/\
ACDS-21.1pro-20.1std.zip
unzip ACDS-21.1pro-20.1std.zip
mv ghrd-socfpga-ACDS-21.1pro-20.1std/s10_soc_devkit_ghrd .
rm -rf ghrd-socfpga-ACDS-21.1pro-20.1std ACDS-21.1pro-20.1std.zip
for version in {0..3}
do
rm -rf ghrd.$version
cp -r s10_soc_devkit_ghrd ghrd.$version
cd ghrd.$version
make clean
make scrub_clean
rm -rf *.qpf *.qsf *.txt *.bin *.qsys ip/qsys_top/ ip/subsys_jtg_mst/ ip\
/subsys_periph/
sed -i 's/BOOTS_FIRST .*= .*/BOOTS_FIRST := fpga/g' Makefile
sed -i 's/ENABLE_WATCHDOG_RST .*= .*/ENABLE_WATCHDOG_RST := 1/g' Makefile
sed -i 's/WATCHDOG_RST_ACTION .*= .*/WATCHDOG_RST_ACTION := remote_update/g' Makefile
sed -i 's/0xACD5CAFE/0xABAB000'$version'/g' create_ghrd_qsys.tcl
export IP_ROOTDIR=~/intelFPGA_pro/21.2/ip
~/intelFPGA_pro/21.2/nios2eds/nios2_command_shell.sh \
make generate_from_tcl
echo "set_global_assignment -name RSU_MAX_RETRY_COUNT 3" \
>> ghrd_1sx280lu2f50e2vg.qsf
~/intelFPGA_pro/21.2/nios2eds/nios2_command_shell.sh \
make sof
cd ..
done
rm -rf s10_soc_devkit_ghrd
cd ..
After completing the above steps, the following SOF files are created:
- hw/ghrd.0/output_files/ghrd_1sx280lu2f50e2vg.sof
- hw/ghrd.1/output_files/ghrd_1sx280lu2f50e2vg.sof
- hw/ghrd.2/output_files/ghrd_1sx280lu2f50e2vg.sof
- hw/ghrd.3/output_files/ghrd_1sx280lu2f50e2vg.sof