Intel® Stratix® 10 Hard Processor System Remote System Update User Guide

ID 683021
Date 11/10/2021
Public

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7.2.2. Building the Hardware Projects

Create four different hardware projects, based on the GHRD from GitHub with a few changes:
  • Change the boot mode to FPGA first
  • Use a different ID in the SystemID component, to make the binaries for each project slightly different.
  • Change the behavior of watchdog timeout, to trigger an RSU event.
  • Set the max retry parameter to 3, so that each application image and the factory image are tried up to three time when configuration failures occur.
The commands to create and compile the projects are listed below:
cd $TOP_FOLDER
# compile hardware designs: 0-factory, 1,2-applications, 3-factory update
rm -rf hw && mkdir hw && cd hw
wget https://github.com/altera-opensource/ghrd-socfpga/archive/\
ACDS-21.1pro-20.1std.zip
unzip ACDS-21.1pro-20.1std.zip
mv ghrd-socfpga-ACDS-21.1pro-20.1std/s10_soc_devkit_ghrd .
rm -rf ghrd-socfpga-ACDS-21.1pro-20.1std ACDS-21.1pro-20.1std.zip
for version in {0..3}
do
rm -rf ghrd.$version
cp -r s10_soc_devkit_ghrd ghrd.$version
cd ghrd.$version
make clean
make scrub_clean
rm -rf *.qpf *.qsf *.txt *.bin *.qsys ip/qsys_top/ ip/subsys_jtg_mst/ ip\
/subsys_periph/
sed -i 's/BOOTS_FIRST .*= .*/BOOTS_FIRST := fpga/g' Makefile
sed -i 's/ENABLE_WATCHDOG_RST .*= .*/ENABLE_WATCHDOG_RST := 1/g' Makefile
sed -i 's/WATCHDOG_RST_ACTION .*= .*/WATCHDOG_RST_ACTION := remote_update/g' Makefile
sed -i 's/0xACD5CAFE/0xABAB000'$version'/g' create_ghrd_qsys.tcl
export IP_ROOTDIR=~/intelFPGA_pro/21.2/ip
~/intelFPGA_pro/21.2/nios2eds/nios2_command_shell.sh \
make generate_from_tcl
echo "set_global_assignment -name RSU_MAX_RETRY_COUNT 3" \
>> ghrd_1sx280lu2f50e2vg.qsf
~/intelFPGA_pro/21.2/nios2eds/nios2_command_shell.sh \
make sof
cd ..
done
rm -rf s10_soc_devkit_ghrd
cd ..
After completing the above steps, the following SOF files are created:
  • hw/ghrd.0/output_files/ghrd_1sx280lu2f50e2vg.sof
  • hw/ghrd.1/output_files/ghrd_1sx280lu2f50e2vg.sof
  • hw/ghrd.2/output_files/ghrd_1sx280lu2f50e2vg.sof
  • hw/ghrd.3/output_files/ghrd_1sx280lu2f50e2vg.sof