CASCADE Primitive

The CASCADE buffer designates the cascade-out function from an AND or OR gate, and acts as a cascade-in to another AND or OR gate. The cascade-in function allows a cascade, which is a fast output located on each combinational logic cell, to be ORed or ANDed with the output of an adjacent combinational logic cell in the device. When you use a CASCADE primitive, the AND or OR gate that feeds the CASCADE primitive and the AND or OR gate that is fed by the CASCADE primitive are placed in the device, with the first symbol logically ORed or ANDed into the second.

When you use a CASCADE primitive, you must observe the following rules:

A CASCADE primitive can feed or be fed only by a single gate, which must be an AND or an OR gate.
An inverted OR gate is treated as an AND gate and vice-versa. Logical equivalents of AND gates are BAND, BNAND, and NOR. Logical equivalents of OR gates are BOR, BNOR, and NAND.
Two CASCADE primitives cannot feed the same gate.
A CASCADE primitive cannot feed an XOR gate.
A CASCADE primitive cannot feed an OUTPUT pin primitive or a register.
The De Morgan's inversion theorem implementation of cascaded ANDandOR gates requires all primitives in a cascaded chain to be of the same type. A cascaded AND gate cannot feed a cascaded OR gate, and vice-versa.

If you use the CASCADE primitive incorrectly, it is ignored and the Compiler issues a warning.

When you turn on the Ignore CASCADE Buffers logic option, the Compiler converts all CASCADE buffers to WIRE primitives.

Note:

Trying to set other parameters not listed in the Parameters table on the ALT_OUTBUF primitive results in errors.
For information about Quartus^® Prime Standard Edition primitive instantiation, go to Using a Quartus^® Prime Standard Edition Logic Function.
The CASCADE primitive is available for supported device(Arria II GZ, CycloneIII, MAXII, MAX V, and StratixIII) families.