hmc_adp_csr_ocp_slv_block Summary

Block

Base Address: 0xF8011000

Register Address Offset	Bit Fields
`soc_hmc_adp_csr_inst_0_ocp_slv_block`
`IP_REV_ID` `0x0` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`SIREV` `0x0`
`DDRIOCTRL` `0x8` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`														`IO_SIZE` `0x0`
`DDRCALSTAT` `0xC` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`														`FAIL` `0x0`	`CAL` `0x0`
`MPR_0BEAT1` `0x10` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`MPR0` `0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`MPR0` `0x0`
`MPR_1BEAT1` `0x14` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`MPR32` `0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`MPR32` `0x0`
`MPR_2BEAT1` `0x18` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`MPR64` `0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`MPR64` `0x0`
`MPR_3BEAT1` `0x1C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`MPR96` `0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`MPR96` `0x0`
`MPR_4BEAT1` `0x20` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`MPR128` `0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`MPR128` `0x0`
`MPR_5BEAT1` `0x24` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`MPR160` `0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`MPR160` `0x0`
`MPR_6BEAT1` `0x28` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`MPR192` `0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`MPR192` `0x0`
`MPR_7BEAT1` `0x2C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`MPR224` `0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`MPR224` `0x0`
`MPR_8BEAT1` `0x30` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`MPR256` `0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`MPR256` `0x0`
`MPR_0BEAT2` `0x34` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`MPR0` `0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`MPR0` `0x0`
`MPR_1BEAT2` `0x38` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`MPR32` `0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`MPR32` `0x0`
`MPR_2BEAT2` `0x3C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`MPR64` `0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`MPR64` `0x0`
`MPR_3BEAT2` `0x40` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`MPR96` `0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`MPR96` `0x0`
`MPR_4BEAT2` `0x44` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`MPR128` `0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`MPR128` `0x0`
`MPR_5BEAT2` `0x48` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`MPR160` `0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`MPR160` `0x0`
`MPR_6BEAT2` `0x4C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`MPR192` `0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`MPR192` `0x0`
`MPR_7BEAT2` `0x50` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`MPR224` `0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`MPR224` `0x0`
`MPR_8BEAT2` `0x54` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`MPR256` `0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`MPR256` `0x0`
`AUTO_PRECHARGE` `0x60` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`															`CTRL` `0x0`
`ECCCTRL1` `0x100` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`															`AUTOWB_CNT_RST` `0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`							`CNT_RST` `0x0`	`Reserved`							`ECC_EN` `0x0`
`ECCCTRL2` `0x104` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`															`OVRW_RB_ECC_EN` `0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`							`RMW_EN` `0x0`	`Reserved`							`AUTOWB_EN` `0x0`
`ERRINTEN` `0x110` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`												`SEQ2CORE_INTREN` `0x0`	`HMI_INTREN` `0x0`	`DERRINTEN` `0x0`	`SERRINTEN` `0x0`
`ERRINTENS` `0x114` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`												`SEQ2CORE_INTRS` `0x0`	`HMI_INTRS` `0x0`	`DERRINTS` `0x0`	`SERRINTS` `0x0`
`ERRINTENR` `0x118` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`												`SEQ2CORE_INTRR` `0x0`	`HMI_INTRR` `0x0`	`DERRINTR` `0x0`	`SERRINTR` `0x0`
`INTMODE` `0x11C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`							`AFICAL_EN` `0x0`	`Reserved`							`INTONCMP` `0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`							`EXT_ADDRPARITY_EN` `0x0`	`Reserved`							`INTMODE` `0x0`
`INTSTAT` `0x120` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`													`DERRBUSFLG` `0x0`	`ADDRPARFLG` `0x0`	`ADDRMTCFLG` `0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`												`SEQ2CORE_PENA` `0x0`	`HMI_PENA` `0x0`	`DERRPENA` `0x0`	`SERRPENA` `0x0`
`DIAGINTTEST` `0x124` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`							`TADDRPAR` `0x0`	`Reserved`							`TADDRMTC` `0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`							`TDERRA` `0x0`	`Reserved`							`TSERRA` `0x0`
`MODSTAT` `0x128` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`							`AUTOWB_DROP_FLG` `0x0`	`Reserved`							`CMPFLGA` `0x0`
`DERRADDRA` `0x12C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`DADDRESS` `0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`DADDRESS` `0x0`
`SERRADDRA` `0x130` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`SADDRESS` `0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`SADDRESS` `0x0`
`AUTOWB_CORRADDR` `0x138` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`SWBADDRESS` `0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`SWBADDRESS` `0x0`
`SERRCNTREG` `0x13C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`SERRCNT` `0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`SERRCNT` `0x0`
`AUTOWB_DROP_CNTREG` `0x140` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`CNT` `0x1`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`CNT` `0x1`
`ECC_REG2WRECCDATABUS` `0x144` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ECC3BUS` `0x0`								`ECC2BUS` `0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ECC1BUS` `0x0`								`ECC0BUS` `0x0`
`ECC_RDECCDATA2REGBUS` `0x148` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ECC3BUS` `0x0`								`ECC2BUS` `0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ECC1BUS` `0x0`								`ECC0BUS` `0x0`
`ECC_REG2RDECCDATABUS` `0x14C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ECC3BUS` `0x0`								`ECC2BUS` `0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ECC1BUS` `0x0`								`ECC0BUS` `0x0`
`ECC_DIAGON` `0x150` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`															`ECCDIAGON` `0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`														`RDDIAGON` `0x0`	`WRDIAGON` `0x0`
`ECC_DECSTAT` `0x154` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`				`DEC3DERRFLG` `0x0`	`DEC2DERRFLG` `0x0`	`DEC1DERRFLG` `0x0`	`DEC0DERRFLG` `0x0`	`DEC3ADDRFLG` `0x0`	`DEC2ADDRFLG` `0x0`	`DEC1ADDRFLG` `0x0`	`DEC0ADDRFLG` `0x0`	`DEC3SERRFLG` `0x0`	`DEC2SERRFLG` `0x0`	`DEC1SERRFLG` `0x0`	`DEC0SERRFLG` `0x0`
`ECC_ERRGENADDR_0` `0x160` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ADDR` `0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ADDR` `0x0`
`ECC_ERRGENADDR_1` `0x164` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ADDR` `0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ADDR` `0x0`
`ECC_ERRGENADDR_2` `0x168` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ADDR` `0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ADDR` `0x0`
`ECC_ERRGENADDR_3` `0x16C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ADDR` `0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ADDR` `0x0`
`ECC_REG2RDDATABUS_BEAT0` `0x170` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ECC3BUS` `0x0`								`ECC2BUS` `0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ECC1BUS` `0x0`								`ECC0BUS` `0x0`
`ECC_REG2RDDATABUS_BEAT1` `0x174` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ECC3BUS` `0x0`								`ECC2BUS` `0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ECC1BUS` `0x0`								`ECC0BUS` `0x0`
`ECC_REG2RDDATABUS_BEAT2` `0x178` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ECC3BUS` `0x0`								`ECC2BUS` `0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ECC1BUS` `0x0`								`ECC0BUS` `0x0`
`ECC_REG2RDDATABUS_BEAT3` `0x17C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ECC3BUS` `0x0`								`ECC2BUS` `0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ECC1BUS` `0x0`								`ECC0BUS` `0x0`
`SERRHADDR` `0x1B4` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`											`SADDRESS` `0x0`
`DERRHADDR` `0x1B0` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`											`DADDRESS` `0x0`
`AUTOWB_CORRHADDR` `0x1BC` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`											`SWBADDRESS` `0x0`
`ECC_ERRGENHADDR_0` `0x180` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`											`ADDR` `0x0`
`ECC_ERRGENHADDR_1` `0x184` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`											`ADDR` `0x0`
`ECC_ERRGENHADDR_2` `0x188` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`											`ADDR` `0x0`
`ECC_ERRGENHADDR_3` `0x18C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`											`ADDR` `0x0`
`HPSINTFCSEL` `0x210` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`											`TILEC_HMC` `0x0`	`TILEC_LANE3` `0x0`	`TILEC_LANE2` `0x0`	`TILEC_LANE1` `0x0`	`TILEC_LANE0` `0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`			`TILEB_HMC` `0x0`	`TILEB_LANE3` `0x0`	`TILEB_LANE2` `0x0`	`TILEB_LANE1` `0x0`	`TILEB_LANE0` `0x0`	`Reserved`			`TILEA_HMC` `0x0`	`TILEA_LANE3` `0x0`	`TILEA_LANE2` `0x0`	`TILEA_LANE1` `0x0`	`TILEA_LANE0` `0x0`
`RSTHANDSHAKESTAT` `0x218` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`								`SEQ2CORE` `0x0`
`RSTHANDSHAKECTRL` `0x214` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`								`CORE2SEQ` `0x0`
`DRAMADDRWIDTH` `0xE0` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`													`CFG_CS_ADDR_WIDTH` `0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`CFG_BANK_GROUP_ADDR_WIDTH` `0x0`		`CFG_BANK_ADDR_WIDTH` `0x0`				`CFG_ROW_ADDR_WIDTH` `0x0`					`CFG_COL_ADDR_WIDTH` `0x0`