clkmgr_mainpllgrp Summary

Base Address: 0xFFD04040

Register Address Offset	Bit Fields
`i_clk_mgr_mainpllgrp`
`vco0` `0x0`	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`			`bwadjen` `RW 0x0`	`bwadj` `RW 0x1`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`						`psrc` `RW 0x0`		`Reserved`	`saten` `RW 0x1`	`fasten` `RW 0x0`	`regextsel` `RW 0x0`	`outresetall` `RW 0x0`	`en` `RW 0x0`	`pwrdn` `RW 0x1`	`bgpwrdn` `RW 0x1`
`vco1` `0x4`	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`										`denom` `RW 0x1`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`			`numer` `RW 0x1`
`en` `0x8`	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`								`hmcpllrefclken` `RW 0x1`	`s2fuser0clken` `RW 0x1`	`cstimerclken` `RW 0x1`	`csclken` `RW 0x1`	`l4spclken` `RW 0x1`	`l4mpclken` `RW 0x1`	`l4mainclken` `RW 0x1`	`mpuclken` `RW 0x1`
`ens` `0xC`	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`								`hmcpllrefclken` `RW 0x1`	`s2fuser0clken` `RW 0x1`	`cstimerclken` `RW 0x1`	`csclken` `RW 0x1`	`l4spclken` `RW 0x1`	`l4mpclken` `RW 0x1`	`l4mainclken` `RW 0x1`	`mpuclken` `RW 0x1`
`enr` `0x10`	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`								`hmcpllrefclken` `RW 0x1`	`s2fuser0clken` `RW 0x1`	`cstimerclken` `RW 0x1`	`csclken` `RW 0x1`	`l4spclken` `RW 0x1`	`l4mpclken` `RW 0x1`	`l4mainclken` `RW 0x1`	`mpuclken` `RW 0x1`
`bypass` `0x14`	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`										`fben` `RW 0x1`	`rfen` `RW 0x1`	`hmcpllref` `RW 0x1`	`s2fuser0` `RW 0x1`	`noc` `RW 0x1`	`mpu` `RW 0x1`
`bypasss` `0x18`	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`										`fben` `RW 0x1`	`rfen` `RW 0x1`	`hmcpllref` `RW 0x1`	`s2fuser0` `RW 0x1`	`noc` `RW 0x1`	`mpu` `RW 0x1`
`bypassr` `0x1C`	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`										`fben` `RW 0x1`	`rfen` `RW 0x1`	`hmcpllref` `RW 0x1`	`s2fuser0` `RW 0x1`	`noc` `RW 0x1`	`mpu` `RW 0x1`
`mpuclk` `0x20`	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`													`src` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`					`cnt` `RW 0x0`
`nocclk` `0x24`	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`													`src` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`					`cnt` `RW 0x0`
`cntr2clk` `0x28`	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`					`cnt` `RW 0x0`
`cntr3clk` `0x2C`	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`					`cnt` `RW 0x0`
`cntr4clk` `0x30`	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`					`cnt` `RW 0x0`
`cntr5clk` `0x34`	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`					`cnt` `RW 0x0`
`cntr6clk` `0x38`	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`					`cnt` `RW 0x0`
`cntr7clk` `0x3C`	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`													`src` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`					`cnt` `RW 0x0`
`cntr8clk` `0x40`	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`					`cnt` `RW 0x0`
`outrst` `0x60`	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`outreset` `RW 0x0`
`outrststat` `0x64`	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`outresetack` `RO 0x0`
`nocdiv` `0x68`	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`			`cspdbgclk` `RW 0x1`	`cstraceclk` `RW 0x2`		`csatclk` `RW 0x0`		`Reserved`						`l4spclk` `RW 0x2`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`						`l4mpclk` `RW 0x1`		`Reserved`						`l4mainclk` `RW 0x0`