System_Mgr Summary

System Manager core registers

Base Address: 0xFFD12000

Register Address Offset	Bit Fields
`i_sys_mgr_core`
`siliconid1` `0x0` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`id` `RO 0x3`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`rev` `RO 0x0`
`siliconid2` `0x4` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`rsv` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`rsv` `RO 0x0`												`device_revision` `RO 0x0`
`wddbg` `0x8` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`				`mode_3` `RW 0x8`				`Reserved`				`mode_2` `RW 0x8`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`				`mode_1` `RW 0x8`				`Reserved`				`mode_0` `RW 0x8`
`mpu_status` `0x10` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`															`uncorrerr` `RO 0x0`
`mpu_ace` `0x14` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`			`arqos` `RW 0x2`					`Reserved`				`awqos` `RW 0x2`
`dma` `0x20` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`irq_ns` `RW 0x0`								`Reserved`							`mgr_ns` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`											`chansel_1` `RW 0x0`	`Reserved`			`chansel_0` `RW 0x0`
`dma_periph` `0x24` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ns` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ns` `RW 0x0`
`sdmmc` `0x28` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`									`smplsel` `RW 0x0`			`Reserved`	`drvsel` `RW 0x0`
`sdmmc_l3master` `0x2C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`						`hauser22_13` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`						`hauser7_6` `RW 0x3`		`Reserved`		`hauser0_1` `RW 0x0`		`hprot` `RW 0x1`
`nand_bootstrap` `0x30` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`			`page512_x16` `RW 0x0`	`Reserved`			`page512` `RW 0x0`	`Reserved`							`tworowaddr` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`							`noloadb0p0` `RW 0x0`	`Reserved`							`noinit` `RW 0x0`
`nand_l3master` `0x34` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`									`arprot` `RW 0x0`			`Reserved`	`awprot` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`		`ardomain` `RW 0x3`		`Reserved`		`awdomain` `RW 0x3`		`awcache_0` `RW 0x0`				`arcache_0` `RW 0x0`
`usb0_l3master` `0x38` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`						`hauser22_13` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`		`hauser7_6` `RW 0x3`		`Reserved`		`hauser_1` `RW 0x0`	`hauser_0` `RW 0x0`	`Reserved`				`hprot` `RW 0x1`
`usb1_l3master` `0x3C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`						`hauser22_13` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`		`hauser7_6` `RW 0x3`		`Reserved`		`hauser_1` `RW 0x0`	`hauser_0` `RW 0x0`	`Reserved`				`hprot` `RW 0x1`
`emac_global` `0x40` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`															`ptp_clk_sel` `RW 0x0`
`emac0` `0x44` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`axi_disable` `RW 0x0`	`sbd_data_endianness` `RW 0x0`	`awprot` `RW 0x2`			`arprot` `RW 0x2`			`awcache` `RW 0x0`				`arcache` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`							`ptp_ref_sel` `RW 0x0`	`Reserved`						`phy_intf_sel` `RW 0x3`
`emac1` `0x48` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`axi_disable` `RW 0x0`	`sbd_data_endianness` `RW 0x0`	`awprot` `RW 0x2`			`arprot` `RW 0x2`			`awcache` `RW 0x0`				`arcache` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`							`ptp_ref_sel` `RW 0x0`	`Reserved`						`phy_intf_sel` `RW 0x3`
`emac2` `0x4C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`axi_disable` `RW 0x0`	`sbd_data_endianness` `RW 0x0`	`awprot` `RW 0x2`			`arprot` `RW 0x2`			`awcache` `RW 0x0`				`arcache` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`							`ptp_ref_sel` `RW 0x0`	`Reserved`						`phy_intf_sel` `RW 0x3`
`emac0_ace` `0x50` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`		`awsid` `RW 0x0`										`Reserved`		`arsid` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`arsid` `RW 0x0`								`Reserved`		`awdomain` `RW 0x3`		`Reserved`		`ardomain` `RW 0x3`
`emac1_ace` `0x54` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`		`awsid` `RW 0x0`										`Reserved`		`arsid` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`arsid` `RW 0x0`								`Reserved`		`awdomain` `RW 0x3`		`Reserved`		`ardomain` `RW 0x3`
`emac2_ace` `0x58` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`		`awsid` `RW 0x0`										`Reserved`		`arsid` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`arsid` `RW 0x0`								`Reserved`		`awdomain` `RW 0x3`		`Reserved`		`ardomain` `RW 0x3`
`nand_axuser` `0x5C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`						`aruser` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`						`awuser` `RW 0x0`
`fpgaintf_en_1` `0x68` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`							`ctmtrigger` `RW 0x1`	`Reserved`							`stmevent` `RW 0x1`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`							`dbgapb` `RW 0x1`	`Reserved`			`traceout` `RW 0x1`	`Reserved`			`tracein` `RW 0x0`
`fpgaintf_en_2` `0x6C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`							`spim_1` `RW 0x0`	`Reserved`							`spim_0` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`							`sdmmc` `RW 0x0`	`Reserved`			`nand` `RW 0x0`	`Reserved`
`fpgaintf_en_3` `0x70` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`															`emac_2` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`							`emac_1` `RW 0x0`	`Reserved`							`emac_0` `RW 0x0`
`dma_l3master` `0x74` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`						`aruser` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ardomain` `RW 0x3`		`awdomain` `RW 0x3`		`Reserved`		`awuser` `RW 0x0`
`etr_l3master` `0x78` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`						`aruser` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ardomain` `RW 0x3`		`awdomain` `RW 0x3`		`Reserved`		`awuser` `RW 0x0`
`sec_ctrl_slt` `0x80` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`															`val` `RO 0x1`
`osc_trim` `0x84` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`								`val` `RO 0x90`
`ecc_intmask_value` `0x90` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`														`ddr1` `RW 0x0`	`ddr0` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`sdmmcb` `RW 0x0`	`sdmmca` `RW 0x0`	`nand_rd` `RW 0x0`	`nand_wr` `RW 0x0`	`nand_buf` `RW 0x0`	`dma` `RW 0x0`	`emac2_tx` `RW 0x0`	`emac2_rx` `RW 0x0`	`emac1_tx` `RW 0x0`	`emac1_rx` `RW 0x0`	`emac0_tx` `RW 0x0`	`emac0_rx` `RW 0x0`	`usb1` `RW 0x0`	`usb0` `RW 0x0`	`ocram` `RW 0x0`	`Reserved`
`ecc_intmask_set` `0x94` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`														`ddr1` `WO 0x0`	`ddr0` `WO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`sdmmcb` `WO 0x0`	`sdmmca` `WO 0x0`	`nand_rd` `WO 0x0`	`nand_wr` `WO 0x0`	`nand_buf` `WO 0x0`	`dma` `WO 0x0`	`emac2_tx` `WO 0x0`	`emac2_rx` `WO 0x0`	`emac1_tx` `WO 0x0`	`emac1_rx` `WO 0x0`	`emac0_tx` `WO 0x0`	`emac0_rx` `WO 0x0`	`usb1` `WO 0x0`	`usb0` `WO 0x0`	`ocram` `WO 0x0`	`Reserved`
`ecc_intmask_clr` `0x98` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`														`ddr1` `WO 0x0`	`ddr0` `WO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`sdmmcb` `WO 0x0`	`sdmmca` `WO 0x0`	`nand_rd` `WO 0x0`	`nand_wr` `WO 0x0`	`nand_buf` `WO 0x0`	`dma` `WO 0x0`	`emac2_tx` `WO 0x0`	`emac2_rx` `WO 0x0`	`emac1_tx` `WO 0x0`	`emac1_rx` `WO 0x0`	`emac0_tx` `WO 0x0`	`emac0_rx` `WO 0x0`	`usb1` `WO 0x0`	`usb0` `WO 0x0`	`ocram` `WO 0x0`	`Reserved`
`ecc_intstatus_serr` `0x9C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`														`ddr1` `RO 0x0`	`ddr0` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`sdmmcb` `RO 0x0`	`sdmmca` `RO 0x0`	`nand_rd` `RO 0x0`	`nand_wr` `RO 0x0`	`nand_buf` `RO 0x0`	`dma` `RO 0x0`	`emac2_tx` `RO 0x0`	`emac2_rx` `RO 0x0`	`emac1_tx` `RO 0x0`	`emac1_rx` `RO 0x0`	`emac0_tx` `RO 0x0`	`emac0_rx` `RO 0x0`	`usb1` `RO 0x0`	`usb0` `RO 0x0`	`ocram` `RO 0x0`	`Reserved`
`ecc_intstatus_derr` `0xA0` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`														`ddr1` `RO 0x0`	`ddr0` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`sdmmcb` `RO 0x0`	`sdmmca` `RO 0x0`	`nand_rd` `RO 0x0`	`nand_wr` `RO 0x0`	`nand_buf` `RO 0x0`	`dma` `RO 0x0`	`emac2_tx` `RO 0x0`	`emac2_rx` `RO 0x0`	`emac1_tx` `RO 0x0`	`emac1_rx` `RO 0x0`	`emac0_tx` `RO 0x0`	`emac0_rx` `RO 0x0`	`usb1` `RO 0x0`	`usb0` `RO 0x0`	`ocram` `RO 0x0`	`Reserved`
`noc_addr_remap` `0xB0` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`															`sdm2hps_be` `RW 0x0`
`hmc_clk` `0xB4` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`													`io_cpa_lock_c` `RO 0x0`	`io_cpa_lock_b` `RO 0x0`	`io_cpa_lock_a` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`					`io_pll_lock_c` `RO 0x0`	`io_pll_lock_b` `RO 0x0`	`io_pll_lock_a` `RO 0x0`	`Reserved`							`status` `RO 0x0`
`io_pa_ctrl` `0xB8` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`													`io_pa_reset_n_c` `RW 0x1`	`io_pa_reset_n_b` `RW 0x1`	`io_pa_reset_n_a` `RW 0x1`
`noc_timeout` `0xC0` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`															`en` `RW 0x0`
`noc_idlereq_set` `0xC4` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`											`lwsoc2fpga` `WO 0x0`	`Reserved`			`soc2fpga` `WO 0x0`
`noc_idlereq_clr` `0xC8` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`											`lwsoc2fpga` `WO 0x0`	`Reserved`			`soc2fpga` `WO 0x0`
`noc_idlereq_value` `0xCC` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`											`lwsoc2fpga` `WO 0x0`	`Reserved`			`soc2fpga` `WO 0x0`
`noc_idleack` `0xD0` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`											`lwsoc2fpga` `RO 0x1`	`Reserved`			`soc2fpga` `RO 0x1`
`noc_idlestatus` `0xD4` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`											`lwsoc2fpga` `RO 0x1`	`Reserved`			`soc2fpga` `RO 0x1`
`fpga2soc_ctrl` `0xD8` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`															`allow_secure` `RW 0x1`
`fpga_config` `0xDC` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`														`early_usermode` `RO 0x0`	`fpga_complete` `RO 0x0`
`iocsrclk_gate` `0xE0` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`															`tilec` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`							`tileb` `RW 0x0`	`Reserved`							`tilea` `RW 0x0`
`gpo` `0xE4` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`val` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`val` `RW 0x0`
`gpi` `0xE8` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`val` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`val` `RO 0x0`
`mpu` `0xF0` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`															`mpu_cfgsdisable` `RW 0x0`
`sdm_hps_spare` `0xF4` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`				`bit_11` `RW 0x0`	`bit_10` `RW 0x0`	`bit_9` `RW 0x0`	`bit_8` `RW 0x0`	`bit_7` `RW 0x0`	`bit_6` `RW 0x0`	`bit_5` `RW 0x0`	`bit_4` `RW 0x0`	`bit_3` `RW 0x0`	`bit_2` `RW 0x0`	`bit_1` `RW 0x0`	`bit_0` `RW 0x0`
`hps_sdm_spare` `0xF8` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`													`val` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`val` `RW 0x0`
`boot_scratch_cold0` `0x200` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`val` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`val` `RW 0x0`
`boot_scratch_cold1` `0x204` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`val` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`val` `RW 0x0`
`boot_scratch_cold2` `0x208` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`val` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`val` `RW 0x0`
`boot_scratch_cold3` `0x20C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`val` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`val` `RW 0x0`
`boot_scratch_cold4` `0x210` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`val` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`val` `RW 0x0`
`boot_scratch_cold5` `0x214` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`val` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`val` `RW 0x0`
`boot_scratch_cold6` `0x218` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`val` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`val` `RW 0x0`
`boot_scratch_cold7` `0x21C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`val` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`val` `RW 0x0`
`boot_scratch_cold8` `0x220` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`val` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`val` `RW 0x0`
`boot_scratch_cold9` `0x224` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`val` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`val` `RW 0x0`
`mpfe_config` `0x228` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`mpfeintfcsel_spare_out` `RW 0x0`														`mpfeintfcsel_C` `RW 0x0`	`mpfeintfcsel_AB` `RW 0x0`
`mpfe_status` `0x22C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`mpfeintfc_stat_spare_in` `RO 0x0`