Thermal Design User Guide: Agilex™ 5 FPGAs and SoCs

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ID 814008
Date 9/30/2024
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Document Table of Contents
Document Table of Contents x
1. Introduction to Agilex™ 5 FPGA Thermal Design Guidelines 2. Agilex™ 5 FPGA Mechanical Construction 3. Agilex™ 5 FPGA CTM Construction 4. Power and Thermal Calculator (PTC) 5. General FPGA Thermal Design Considerations 6. Design Examples 7. Heat Sinks 8. Document Revision History for the Thermal Design User Guide: Agilex™ 5 FPGAs and SoCs A. Agilex™ 5 FPGA Product Keys and Package Drawings
1. Introduction to Agilex™ 5 FPGA Thermal Design Guidelines x
1.1. Definitions of Thermal and Power Terms Used in this Document
2. Agilex™ 5 FPGA Mechanical Construction x
2.1. Built-in Temperature Sensors
2.1. Built-in Temperature Sensors x
2.1.1. Agilex™ 5 FPGA Temperature Rating
3. Agilex™ 5 FPGA CTM Construction x
3.1. CTM File Format 3.2. Thermal Modeling with the CTM 3.3. CTM Top Temperature, TCASE Virtual Sensor 3.4. Obtaining the CTM
4. Power and Thermal Calculator (PTC) x
4.1. PTC Thermal Tab Parameters 4.2. Thermal Analysis with the PTC 4.3. PTC Thermal Tab Calculation Options 4.4. Thermal Resistances and Low Power Devices 4.5. Sensor Temperatures on the PTC Thermal Tab
5. General FPGA Thermal Design Considerations x
5.1. FPGA Power Considerations
5.1. FPGA Power Considerations x
5.1.1. FPGA Maximum Allowed Power Dissipation 5.1.2. Static, Dynamic, and Standby Power
5.1.2. Static, Dynamic, and Standby Power x
5.1.2.1. Future-Proofing an FPGA Thermal Design
6. Design Examples x
6.1. Example 1: Constant Die Power with CFD and TJ-MAX Calculation Mode 6.2. Example 2: Solution with Temperature-Dependent Power 6.3. Example 3: Known Cooling Capacity 6.4. Example 4: Heat Sink Selection
6.1. Example 1: Constant Die Power with CFD and TJ-MAX Calculation Mode x
6.1.1. CFD Results
7. Heat Sinks x
7.1. Attachment Force 7.2. Thermal Interface Material (TIM)
1. Introduction to Agilex™ 5 FPGA Thermal Design Guidelines
2. Agilex™ 5 FPGA Mechanical Construction
3. Agilex™ 5 FPGA CTM Construction
4. Power and Thermal Calculator (PTC)
5. General FPGA Thermal Design Considerations
6. Design Examples
7. Heat Sinks
8. Document Revision History for the Thermal Design User Guide: Agilex™ 5 FPGAs and SoCs
A. Agilex™ 5 FPGA Product Keys and Package Drawings

5.1.1. FPGA Maximum Allowed Power Dissipation

FPGAs are not generally rated for any thermal design power (TDP). The maximum power dissipation generally depends on the number of power pins and the maximum rated current for each pin.

Maximum current values are based on reliability values for operation at 100⁰ C junction temperature. At lower temperatures, it is possible to run at higher powers than the maximum, or if the lifetime of the application can be reduced. You should refer such requests to your Intel Field Application Engineer for further analysis.

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