Thermal Design User Guide: Agilex™ 5 FPGAs and SoCs

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ID 814008
Date 9/30/2024
Public
Document Table of Contents
Document Table of Contents x
1. Introduction to Agilex™ 5 FPGA Thermal Design Guidelines 2. Agilex™ 5 FPGA Mechanical Construction 3. Agilex™ 5 FPGA CTM Construction 4. Power and Thermal Calculator (PTC) 5. General FPGA Thermal Design Considerations 6. Design Examples 7. Heat Sinks 8. Document Revision History for the Thermal Design User Guide: Agilex™ 5 FPGAs and SoCs A. Agilex™ 5 FPGA Product Keys and Package Drawings
1. Introduction to Agilex™ 5 FPGA Thermal Design Guidelines x
1.1. Definitions of Thermal and Power Terms Used in this Document
2. Agilex™ 5 FPGA Mechanical Construction x
2.1. Built-in Temperature Sensors
2.1. Built-in Temperature Sensors x
2.1.1. Agilex™ 5 FPGA Temperature Rating
3. Agilex™ 5 FPGA CTM Construction x
3.1. CTM File Format 3.2. Thermal Modeling with the CTM 3.3. CTM Top Temperature, TCASE Virtual Sensor 3.4. Obtaining the CTM
4. Power and Thermal Calculator (PTC) x
4.1. PTC Thermal Tab Parameters 4.2. Thermal Analysis with the PTC 4.3. PTC Thermal Tab Calculation Options 4.4. Thermal Resistances and Low Power Devices 4.5. Sensor Temperatures on the PTC Thermal Tab
5. General FPGA Thermal Design Considerations x
5.1. FPGA Power Considerations
5.1. FPGA Power Considerations x
5.1.1. FPGA Maximum Allowed Power Dissipation 5.1.2. Static, Dynamic, and Standby Power
5.1.2. Static, Dynamic, and Standby Power x
5.1.2.1. Future-Proofing an FPGA Thermal Design
6. Design Examples x
6.1. Example 1: Constant Die Power with CFD and TJ-MAX Calculation Mode 6.2. Example 2: Solution with Temperature-Dependent Power 6.3. Example 3: Known Cooling Capacity 6.4. Example 4: Heat Sink Selection
6.1. Example 1: Constant Die Power with CFD and TJ-MAX Calculation Mode x
6.1.1. CFD Results
7. Heat Sinks x
7.1. Attachment Force 7.2. Thermal Interface Material (TIM)
1. Introduction to Agilex™ 5 FPGA Thermal Design Guidelines
2. Agilex™ 5 FPGA Mechanical Construction
3. Agilex™ 5 FPGA CTM Construction
4. Power and Thermal Calculator (PTC)
5. General FPGA Thermal Design Considerations
6. Design Examples
7. Heat Sinks
8. Document Revision History for the Thermal Design User Guide: Agilex™ 5 FPGAs and SoCs
A. Agilex™ 5 FPGA Product Keys and Package Drawings

3.2. Thermal Modeling with the CTM

To perform thermal modeling with the CTM you must build the appropriate computational fluid dynamic (CFD) model for your system analysis with the applicable CTM or CTMs and corresponding power values for the die or dies.

The power values for each design are calculated by the Quartus® Prime software or PTC. A given FPGA can have an infinite number of unique designs, each with unique power dissipation and power map characteristics. In other words, there is no set TDP for FPGAs and the CTMs do not come with built-in power dissipation and power map characteristics. Therefore, the thermal analyst must work with the FPGA design team to obtain power values and the TCASE limit value for each iteration of the design.

The CFD analysis predicts the temperature of all the components in a CTM; however, the only usable data from the CFD results is the TCASE temperature at the top of the die. The TCASE temperature indicates whether the cooling solution meets the design requirement.

Two designs on the same FPGA can have the same powers for each die, the same user limit on junction temperature, but two different TCASE requirements. This occurs when changes in local power densities require additional cooling.

For a given junction temperature, the required TCASE value does not change with changes to the ambient temperature. For example, for a given design with TJ-MAX set to 95⁰ C, the PTC may require a case temperature of 87⁰ C to meet that condition. This case temperature remains the same, regardless of changes in the ambient temperature.

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