Thermal Design User Guide: Agilex™ 5 FPGAs and SoCs

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ID 814008
Date 9/30/2024
Public
Document Table of Contents
Document Table of Contents x
1. Introduction to Agilex™ 5 FPGA Thermal Design Guidelines 2. Agilex™ 5 FPGA Mechanical Construction 3. Agilex™ 5 FPGA CTM Construction 4. Power and Thermal Calculator (PTC) 5. General FPGA Thermal Design Considerations 6. Design Examples 7. Heat Sinks 8. Document Revision History for the Thermal Design User Guide: Agilex™ 5 FPGAs and SoCs A. Agilex™ 5 FPGA Product Keys and Package Drawings
1. Introduction to Agilex™ 5 FPGA Thermal Design Guidelines x
1.1. Definitions of Thermal and Power Terms Used in this Document
2. Agilex™ 5 FPGA Mechanical Construction x
2.1. Built-in Temperature Sensors
2.1. Built-in Temperature Sensors x
2.1.1. Agilex™ 5 FPGA Temperature Rating
3. Agilex™ 5 FPGA CTM Construction x
3.1. CTM File Format 3.2. Thermal Modeling with the CTM 3.3. CTM Top Temperature, TCASE Virtual Sensor 3.4. Obtaining the CTM
4. Power and Thermal Calculator (PTC) x
4.1. PTC Thermal Tab Parameters 4.2. Thermal Analysis with the PTC 4.3. PTC Thermal Tab Calculation Options 4.4. Thermal Resistances and Low Power Devices 4.5. Sensor Temperatures on the PTC Thermal Tab
5. General FPGA Thermal Design Considerations x
5.1. FPGA Power Considerations
5.1. FPGA Power Considerations x
5.1.1. FPGA Maximum Allowed Power Dissipation 5.1.2. Static, Dynamic, and Standby Power
5.1.2. Static, Dynamic, and Standby Power x
5.1.2.1. Future-Proofing an FPGA Thermal Design
6. Design Examples x
6.1. Example 1: Constant Die Power with CFD and TJ-MAX Calculation Mode 6.2. Example 2: Solution with Temperature-Dependent Power 6.3. Example 3: Known Cooling Capacity 6.4. Example 4: Heat Sink Selection
6.1. Example 1: Constant Die Power with CFD and TJ-MAX Calculation Mode x
6.1.1. CFD Results
7. Heat Sinks x
7.1. Attachment Force 7.2. Thermal Interface Material (TIM)
1. Introduction to Agilex™ 5 FPGA Thermal Design Guidelines
2. Agilex™ 5 FPGA Mechanical Construction
3. Agilex™ 5 FPGA CTM Construction
4. Power and Thermal Calculator (PTC)
5. General FPGA Thermal Design Considerations
6. Design Examples
7. Heat Sinks
8. Document Revision History for the Thermal Design User Guide: Agilex™ 5 FPGAs and SoCs
A. Agilex™ 5 FPGA Product Keys and Package Drawings

4.1. PTC Thermal Tab Parameters

The Thermal tab of the PTC is where you input relevant thermal parameters for your design, and find the output needed for the thermal analysis.
Figure 3. PTC Thermal Tab
Table 4.  PTC Thermal Tab Parameter Definitions
Parameter Description
TA (⁰ C) Ambient temperature, measured locally surrounding the FPGA. Measure the ambient temperature just upstream of a passive heat sink or at the fan inlet for an active heat sink. This value affects the junction temperature of the main FPGA core fabric die and its power dissipation.
TJ-MAX (⁰ C) By default, the PTC sets this value to 100 ⁰C when the PTC calculation mode is set to Find a cooling solution for Maximum junction temperature limit. However, note that you can change this value and set your own target maximum temperature. Also, the PTC can calculate this value if the calculation mode is set to Find available thermal margin for cooling solution.
TCASE (⁰ C)

The temperature at the top of the exposed die. For a design to not exceed its TJ-MAX, the cooling solution must be able to maintain the TCASE temperature at or below the TCASE temperature reported by the PTC.

Power (W) Power dissipation of the die.
Temperature Margin (⁰ C) When the available cooling solution keeps the TJ-MAX below the set design goal , the PTC shows the difference as the Temperature Margin.
Power Margin (⁰ C) When the available cooling is more than necessary to maintain the TJ-MAX below the design goal, the PTC calculates how much additional power can be added to the design before the design goal is reached. This additional capacity is the Power Margin.
ΨJC (⁰ C/W)

The thermal resistance between the hot spot on the die and the top center of the die.

The ΨJC value is calculated by this equation:

ΨJC=(TJ-MAX-TCASE)/ Power

Note:ΨJC values are not constant for a specific package and change as the FPGA resource usage changes.
ΨCA (⁰ C/W)

The thermal resistance between the top center of the exposed die and the ambient ΨCA can be used as a figure of merit in assessing the required cooling solution for a design. For example, the lower the ΨCA value, the more aggressive cooling solution is needed. The value of ΨCA is calculated by this equation:

ΨCA = (TCASE - TA) / Power

Note: ΨCA values are not constant for a specific package and change as the FPGA resource and ambient temperature changes. You must recalculate this value for each design.
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