Intel Agilex® 7 General-Purpose I/O User Guide: M-Series

ID 772138
Date 9/11/2023
Public

A newer version of this document is available. Customers should click here to go to the newest version.

Document Table of Contents

2.3.2. Assigning Pin I/O Standards in the Intel® Quartus® Prime Pin Planner

You can use the Intel® Quartus® Prime Pin Planner for I/O pin planning, assignment, and validation.
Figure 5.  Intel® Quartus® Prime Pin Planner This figure shows an example of the user interface and does not represent actual components, features, or settings supported by M-Series FPGAs.
  1. From the Intel® Quartus® Prime menu, select Assignments > Pin Planner.
  2. Under the Node Name column in the All Pins box, look for the pin that you want to configure.
  3. Under the Location column, select the specific pin location.
    The I/O Bank column displays the I/O bank name where the pin resides. The Top View - Flip Chip diagram shows the I/O banks in different colors.
  4. Under the I/O Standard column, select the supported I/O standards that you want to assign to the pin.
    If you select True Differential Signaling, the Pin Planner automatically adds a negative node with a specific pin location.